{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T22:38:06Z","timestamp":1729636686330,"version":"3.28.0"},"reference-count":11,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/ipdps.2003.1213324","type":"proceedings-article","created":{"date-parts":[[2004,3,22]],"date-time":"2004-03-22T09:34:28Z","timestamp":1079948068000},"page":"8","source":"Crossref","is-referenced-by-count":5,"title":["Metrics for reconfigurable architectures characterization: remanence and scalability"],"prefix":"10.1109","author":[{"given":"P.","family":"Benoit","sequence":"first","affiliation":[]},{"given":"G.","family":"Sassatelli","sequence":"additional","affiliation":[]},{"given":"L.","family":"Torres","sequence":"additional","affiliation":[]},{"given":"D.","family":"Demigny","sequence":"additional","affiliation":[]},{"given":"M.","family":"Robert","sequence":"additional","affiliation":[]},{"given":"G.","family":"Cambon","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"journal-title":"Xilinx The programmable logic data book","year":"2000","key":"ref4"},{"journal-title":"The Roadmap to Reconfigurable Computing Proc FPL2000","year":"2000","author":"hartenstein","key":"ref3"},{"key":"ref10","article-title":"Méthodes et architectures pour le TSI en temps reel","author":"demigny","year":"0","journal-title":"Traité IC2 - Série Traitement du signal et de l'image"},{"article-title":"Architectures reconfigurables dynamiquement pour les systèmes sur puce","year":"2002","author":"sassatelli","key":"ref6"},{"key":"ref11","doi-asserted-by":"crossref","DOI":"10.1117\/12.327025","article-title":"Comparing Computing Machines","volume":"3526","author":"dehon","year":"1998","journal-title":"Proceedings SPIE Configurable Computing Technology and Applications"},{"journal-title":"Why reconfigurable computing Computer Structures Group","year":"0","key":"ref5"},{"article-title":"Computer Design and Architecture","year":"2000","author":"shiva","key":"ref8"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2002.998353"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/2.642810"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/800046.801684"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/54.500200"}],"event":{"name":"International Parallel and Distributed Processing Symposium (IPDPS 2003)","acronym":"IPDPS-03","location":"Nice, France"},"container-title":["Proceedings International Parallel and Distributed Processing Symposium"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8608\/27277\/01213324.pdf?arnumber=1213324","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,16]],"date-time":"2017-06-16T00:26:05Z","timestamp":1497572765000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1213324\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/ipdps.2003.1213324","relation":{},"subject":[]}}