{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,6]],"date-time":"2026-02-06T03:04:33Z","timestamp":1770347073669,"version":"3.49.0"},"reference-count":27,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2006]]},"DOI":"10.1109\/ipdps.2006.1639272","type":"proceedings-article","created":{"date-parts":[[2006,7,10]],"date-time":"2006-07-10T19:59:56Z","timestamp":1152561596000},"page":"9 pp.","source":"Crossref","is-referenced-by-count":2,"title":["On the effectiveness of speculative and selective memory fences"],"prefix":"10.1109","author":[{"given":"O.","family":"Trachsel","sequence":"first","affiliation":[]},{"given":"C.","family":"von Praun","sequence":"additional","affiliation":[]},{"given":"T.R.","family":"Gross","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"19","author":"lea","year":"2005","journal-title":"The JSR-133 cookbook for compiler writers"},{"key":"17","author":"zurich","year":"2004","journal-title":"Compiler Framework"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1109\/12.599898"},{"key":"15","first-page":"1","year":"2006","journal-title":"IA-32 Intel Architecture Software Developer's Manual"},{"key":"16","author":"grande forum","year":"1999","journal-title":"Multi-threaded benchmark suite"},{"key":"13","article-title":"The Microarchitecture of the Pentium 4 Processor","volume":"1","author":"hinton","year":"2001","journal-title":"Intel Technology Journal"},{"key":"14","year":"2005","journal-title":"IA-32 Intel Architecture Optimization Reference"},{"key":"11","author":"gosling","year":"2000","journal-title":"The Java Language Specification"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1145\/291069.291020"},{"key":"21","year":"0"},{"key":"20","first-page":"378","article-title":"The Java memory model","author":"manson","year":"2005","journal-title":"POPL '05 Proceedings of the 32nd Symp on Principles of Programming Languages"},{"key":"22","doi-asserted-by":"crossref","first-page":"294","DOI":"10.1109\/MICRO.2001.991127","article-title":"Speculative lock elision: Enabling highly concurrent multithreaded execution","author":"rajwar","year":"2001","journal-title":"Proc 34th Ann Int'l Symp Microarchitecture (Micro 01)"},{"key":"23","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.1997.569650"},{"key":"24","year":"1998","journal-title":"SPEC JVM98 benchmarks"},{"key":"25","year":"2000","journal-title":"SPEC JBB2000 Benchmark"},{"key":"26","doi-asserted-by":"publisher","DOI":"10.1145\/320384.320400"},{"key":"27","year":"0","journal-title":"Jigsaw Webserver"},{"key":"3","first-page":"190","article-title":"ICC++ -A C++ dialect for high performance parallel computing","author":"chien","year":"1996","journal-title":"2nd Intl Symp on Object Technologies for Advanced Software (ISOTAS)"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1145\/320384.320388"},{"key":"1","first-page":"19","article-title":"Static analyses for eliminating unnecessary synchronization from Java programs","author":"aldrich","year":"1999","journal-title":"Proceedings of the 6th International Symposium on Static Analysis (SAS'99)"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1145\/307338.300993"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1145\/782814.782854"},{"key":"6","article-title":"Inserting fences to guarantee sequential consistency","author":"fang","year":"2002"},{"key":"5","doi-asserted-by":"crossref","first-page":"434","DOI":"10.1145\/17356.17406","article-title":"Memory access buffering in multiprocessors","author":"dubois","year":"1986","journal-title":"Proc of the 18th Intl Symp on Computer Architecture (ISCA '86)"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1145\/320384.320386"},{"key":"9","first-page":"355","article-title":"Two techniques to enhance the performance of memory consistency models","author":"gharachorloo","year":"1991","journal-title":"Proc of the 1991 Intl Conf on Parallel Processing (ICPP'91)"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1145\/106972.106997"}],"event":{"name":"Proceedings 20th IEEE International Parallel & Distributed Processing Symposium","location":"Rhodes Island, Greece","start":{"date-parts":[[2006,4,25]]},"end":{"date-parts":[[2006,4,29]]}},"container-title":["Proceedings 20th IEEE International Parallel & Distributed Processing Symposium"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/10917\/34366\/01639272.pdf?arnumber=1639272","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,4,19]],"date-time":"2019-04-19T23:21:58Z","timestamp":1555716118000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1639272\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2006]]},"references-count":27,"URL":"https:\/\/doi.org\/10.1109\/ipdps.2006.1639272","relation":{},"subject":[],"published":{"date-parts":[[2006]]}}}