{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,10,16]],"date-time":"2026-10-16T20:42:07Z","timestamp":1792183327176,"version":"4.4.0"},"reference-count":19,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2006]]},"DOI":"10.1109\/ipdps.2006.1639301","type":"proceedings-article","created":{"date-parts":[[2006,7,10]],"date-time":"2006-07-10T19:59:56Z","timestamp":1152561596000},"page":"10 pp.","source":"Crossref","is-referenced-by-count":9,"title":["A study of the on-chip interconnection network for the IBM Cyclops64 multi-core architecture"],"prefix":"10.1109","author":[{"family":"Ying Ping Zhang","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"family":"Taikyeong Jeong","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"family":"Fei Chen","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"family":"Haiping Wu","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"R.","family":"Nitzsche","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"G.R.","family":"Gao","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1007\/s10586-007-0011-1"},{"key":"17","article-title":"On the performance of bus interconnection for socs","author":"zhang","year":"2002","journal-title":"Proceedings of 4th Workshop on Media and Stream Processors (in conjunction with IEEE\/ACM MICRO-35)"},{"key":"18","author":"zhang","year":"2005","journal-title":"A study of architecture and performance of ibm cyclops64 interconnection network"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1145\/1067649.801740"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2003.1275754"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/2.612253"},{"key":"14","doi-asserted-by":"crossref","first-page":"408","DOI":"10.1145\/1080695.1070004","article-title":"Interconnections in multi-core architectures: Understanding mechanisms, overheads and scaling","volume":"33","author":"kumar","year":"2005","journal-title":"SIGARCH Cornput Archit News"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1007\/s10766-006-0019-9"},{"key":"12","year":"0"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1145\/1065010.1065038"},{"key":"2","first-page":"282","article-title":"Piranha: a scalable architecture based on single-chip multiprocessing","author":"barroso","year":"2000","journal-title":"Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat No RS00201) ISCA"},{"key":"1","year":"0","journal-title":"Freescale announces industrys first 90nm multicore programmable DSPs in volume production"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1981.1675776"},{"key":"7","article-title":"Toward a software infrastructure for the cyclops-64 cellular architecture","author":"del cuvillo","year":"0","journal-title":"The 21st International Symposium on High Performance Computing Systems and Applications"},{"key":"6","doi-asserted-by":"crossref","DOI":"10.1145\/1128022.1128030","article-title":"Landing openmp on cyclops-64: An efficient mapping of openmp to a many-core system-on-a-chip","author":"del cuvillo","year":"2006","journal-title":"ACM International Conference on Computing Frontiers"},{"key":"5","author":"dally","year":"2004","journal-title":"Principles and Practices of Interconnection Networks"},{"key":"4","article-title":"Fast: A functionally accurate simulation toolset for the cyclops64 cellular architecture","author":"cuvillo","year":"2005","journal-title":"Workshop on Modeling Benchmarking and simulation (MoBS) Held in conjunction with the 32nd Annual International Symposium on Computer Architecture (ISCA'05)"},{"key":"9","article-title":"Computing at the speed of life: The blue gene\/cyclops supercomputer","author":"denneau","year":"2002","journal-title":"Distinguished Lecture Series"},{"key":"8","article-title":"Tiny threads: A thread virtual machine for the cyclops64 cellular architecture","author":"del cuvillo","year":"2005","journal-title":"Proceedings of 5th Workshop on Massively Parallel Processing (WMPP05) in conjuction with the 19th International Parallel and Distributed Processing Symposium (IPDPS2005)"}],"event":{"name":"Proceedings 20th IEEE International Parallel & Distributed Processing Symposium","location":"Rhodes Island, Greece","start":{"date-parts":[[2006,4,25]]},"end":{"date-parts":[[2006,4,29]]}},"container-title":["Proceedings 20th IEEE International Parallel & Distributed Processing Symposium"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/10917\/34366\/01639301.pdf?arnumber=1639301","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,5,8]],"date-time":"2023-05-08T00:55:07Z","timestamp":1683507307000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1639301\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2006]]},"references-count":19,"URL":"https:\/\/doi.org\/10.1109\/ipdps.2006.1639301","relation":{},"subject":[],"published":{"date-parts":[[2006]]}}}