{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T05:27:18Z","timestamp":1729661238687,"version":"3.28.0"},"reference-count":12,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2006]]},"DOI":"10.1109\/ipdps.2006.1639372","type":"proceedings-article","created":{"date-parts":[[2006,7,10]],"date-time":"2006-07-10T19:59:56Z","timestamp":1152561596000},"page":"10 pp.","source":"Crossref","is-referenced-by-count":0,"title":["Parallelizing post-placement timing optimization"],"prefix":"10.1109","author":[{"family":"Jiyoun Kim","sequence":"first","affiliation":[]},{"given":"M.C.","family":"Papaefthymiou","sequence":"additional","affiliation":[]},{"given":"J.L.","family":"Neves","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"journal-title":"Computers and Intractability A Guide to the Theory of NP- Completeness","year":"1979","author":"garey","key":"3"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1006\/jpdc.1998.1523"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/ICVD.1997.568183"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1145\/505388.505414"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/CLUSTR.2001.959956"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/GLSV.1995.516055"},{"year":"0","key":"5"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/SIMSYM.1998.668488"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/43.293940"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/4235.585890"},{"key":"11","doi-asserted-by":"crossref","first-page":"879","DOI":"10.1109\/TCAD.2005.847942","article-title":"A fast algorithm for optimal buffer insertion","volume":"24","author":"shi","year":"2005","journal-title":"IEEE Trans Computer-Aided Design of Integrated Circuits and Systems"},{"key":"12","doi-asserted-by":"crossref","first-page":"1342","DOI":"10.1109\/43.663824","article-title":"A parallel standard cell placement algorithm","volume":"16","author":"sun","year":"1997","journal-title":"IEEE Trans on Computer-Aided Design of Integrated Circuits and Systems"}],"event":{"name":"Proceedings 20th IEEE International Parallel & Distributed Processing Symposium","start":{"date-parts":[[2006,4,25]]},"location":"Rhodes Island, Greece","end":{"date-parts":[[2006,4,29]]}},"container-title":["Proceedings 20th IEEE International Parallel &amp; Distributed Processing Symposium"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/10917\/34366\/01639372.pdf?arnumber=1639372","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,17]],"date-time":"2017-06-17T07:22:58Z","timestamp":1497684178000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1639372\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2006]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/ipdps.2006.1639372","relation":{},"subject":[],"published":{"date-parts":[[2006]]}}}