{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,3]],"date-time":"2024-09-03T21:38:43Z","timestamp":1725399523028},"reference-count":7,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2006]]},"DOI":"10.1109\/ipdps.2006.1639446","type":"proceedings-article","created":{"date-parts":[[2006,7,10]],"date-time":"2006-07-10T19:59:56Z","timestamp":1152561596000},"page":"8 pp.","source":"Crossref","is-referenced-by-count":11,"title":["Dedicated module access in dynamically reconfigurable systems"],"prefix":"10.1109","author":[{"given":"J.","family":"Hagemeyer","sequence":"first","affiliation":[]},{"given":"B.","family":"Kettelhoit","sequence":"additional","affiliation":[]},{"given":"M.","family":"Porrmann","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"3","article-title":"Two flows for partial reconfiguration: Module based or small bit manipulation","author":"lim","year":"2002","journal-title":"Xilinx Application Note 290"},{"journal-title":"Xilinx Virtex-II Platform FPGA User Guide","year":"2005","author":"xilinx","key":"2"},{"key":"1","article-title":"Xilinx Application Note 151","author":"xilinx","year":"2003","journal-title":"Virtex series configuration architecture user guide"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2005.380"},{"key":"6","article-title":"Real-Time LUT-based Network Topologies for Dynamic and Partial Self-Reconfiguration","author":"becker","year":"2003","journal-title":"Proc 11th VLSI-SoC Int Conf Very Large Scale Integration"},{"key":"5","article-title":"System-on-Programmable-Chip Approach Enabling Online Fine-Grained ID-Placement","author":"kalte","year":"2004","journal-title":"Proc 11th Reconfigurable Architectures Workshop"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2005.1515724"}],"event":{"name":"Proceedings 20th IEEE International Parallel & Distributed Processing Symposium","start":{"date-parts":[[2006,4,25]]},"location":"Rhodes Island, Greece","end":{"date-parts":[[2006,4,29]]}},"container-title":["Proceedings 20th IEEE International Parallel & Distributed Processing Symposium"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/10917\/34366\/01639446.pdf?arnumber=1639446","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,14]],"date-time":"2017-03-14T15:30:57Z","timestamp":1489505457000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1639446\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2006]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/ipdps.2006.1639446","relation":{},"subject":[],"published":{"date-parts":[[2006]]}}}