{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T04:22:26Z","timestamp":1725423746969},"reference-count":45,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2008,4]]},"DOI":"10.1109\/ipdps.2008.4536541","type":"proceedings-article","created":{"date-parts":[[2008,6,6]],"date-time":"2008-06-06T16:44:52Z","timestamp":1212770692000},"page":"1-8","source":"Crossref","is-referenced-by-count":0,"title":["Sustainable (re-) configurable solutions for the high volume SoC market"],"prefix":"10.1109","author":[{"given":"Fabio","family":"Campi","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Luca","family":"Ciccarelli","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Claudio","family":"Mucci","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"journal-title":"System-level EDA software and services for SoC designers","year":"0","key":"19"},{"journal-title":"Faraday Structured ASIC","year":"0","key":"35"},{"year":"0","key":"17"},{"journal-title":"HardCopy Structured ASICs","year":"0","key":"36"},{"journal-title":"System-level design Orthogonalization of concerns and platform-based design TCAD-ICS","year":"2000","author":"keutzer","key":"18"},{"journal-title":"A METAL and VIA mask programmable VLSI design methodology using PLA","year":"2004","author":"jayakumar","key":"33"},{"journal-title":"1V Heterogeneus Reconfigurable Processor IC for Baseband Wireless Applications","year":"0","author":"zhang","key":"15"},{"key":"34","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2008.50"},{"journal-title":"Tilera","year":"0","key":"16"},{"journal-title":"FlexASIC structured array A solution to the DSM challenge DesignCon","year":"2005","author":"levinthal","key":"39"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/MCOM.2003.1166666"},{"journal-title":"Evaluation of the Raw microprocessor [ ]","year":"2004","author":"bedford","key":"14"},{"journal-title":"LSI Logic RapidChip","year":"0","key":"37"},{"year":"0","key":"11"},{"journal-title":"Structured ASIC Starting Line Vendors Announce New Families FPGA Journal","year":"2005","author":"morris","key":"38"},{"journal-title":"A reconfigurable System Featuring Dynamically Extensible [ ]","year":"0","author":"borgatti","key":"12"},{"journal-title":"Wireless Multistandard Receivers","year":"2006","author":"harju","key":"21"},{"year":"0","key":"20"},{"year":"0","key":"43"},{"journal-title":"Semiconductors","year":"0","key":"42"},{"journal-title":"Standard Metal Solutions for Structured ASICs and Configurable SOCs","year":"0","key":"41"},{"article-title":"customizable and programmable cell array","year":"2001","author":"orbach","key":"40"},{"journal-title":"Engineering the Complex SOC","year":"2004","author":"rowen","key":"45"},{"key":"44","doi-asserted-by":"publisher","DOI":"10.1109\/2.204677"},{"journal-title":"ARChitect white paper","year":"0","key":"22"},{"journal-title":"Design space exploration of partially reconfigurable embedded processors","year":"0","author":"chattopadhyay","key":"23"},{"journal-title":"Exploring Regular Fabrics to Optimize the Performance-Cost Tradeoff","year":"2003","author":"pileggi","key":"24"},{"year":"0","key":"25"},{"key":"26","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2002.1167533"},{"key":"27","article-title":"regularity in physical design","author":"palusinski","year":"2001","journal-title":"GSRC Workshop"},{"key":"28","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2003.1240929"},{"key":"29","doi-asserted-by":"publisher","DOI":"10.1145\/981066.981088"},{"year":"0","key":"3"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2001.915091"},{"journal-title":"Cisco 7304 router","year":"0","key":"10"},{"key":"1","doi-asserted-by":"crossref","DOI":"10.1109\/2.839320","article-title":"the density advantage of reconfigurable computing","author":"dehon","year":"2000","journal-title":"IEEE Computers"},{"key":"30","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2005.863196"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/12.859540"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-46117-5_41"},{"journal-title":"PLA-based regular structures and their synthesis TCAD of Integrated Circuits and Systems","year":"2003","author":"mo","key":"32"},{"year":"0","key":"5"},{"key":"31","doi-asserted-by":"publisher","DOI":"10.1145\/981066.981086"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/ENABL.2001.953417"},{"journal-title":"Cray XD1","year":"0","key":"9"},{"year":"0","key":"8"}],"event":{"name":"Distributed Processing Symposium (IPDPS)","start":{"date-parts":[[2008,4,14]]},"location":"Miami, FL, USA","end":{"date-parts":[[2008,4,18]]}},"container-title":["2008 IEEE International Symposium on Parallel and Distributed Processing"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4519061\/4536075\/04536541.pdf?arnumber=4536541","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,18]],"date-time":"2017-06-18T08:55:17Z","timestamp":1497776117000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4536541\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,4]]},"references-count":45,"URL":"https:\/\/doi.org\/10.1109\/ipdps.2008.4536541","relation":{},"ISSN":["1530-2075"],"issn-type":[{"type":"print","value":"1530-2075"}],"subject":[],"published":{"date-parts":[[2008,4]]}}}