{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,19]],"date-time":"2025-03-19T16:58:50Z","timestamp":1742403530692,"version":"3.37.0"},"reference-count":21,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009,5]]},"DOI":"10.1109\/ipdps.2009.5161039","type":"proceedings-article","created":{"date-parts":[[2009,7,20]],"date-time":"2009-07-20T19:56:45Z","timestamp":1248119805000},"page":"1-12","source":"Crossref","is-referenced-by-count":33,"title":["A framework for efficient and scalable execution of domain-specific templates on GPUs"],"prefix":"10.1109","author":[{"given":"Narayanan","family":"Sundaram","sequence":"first","affiliation":[]},{"given":"Anand","family":"Raghunathan","sequence":"additional","affiliation":[]},{"given":"Srimat T.","family":"Chakradhar","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1145\/1356058.1356084"},{"journal-title":"RapidMind Multi-Core Development Platform","year":"0","key":"17"},{"year":"0","key":"18"},{"year":"0","key":"15"},{"key":"16","article-title":"toward automatic parallelization and auto-tuning of affine kernels for gpus","author":"ramanujam","year":"2008","journal-title":"Workshop on Automatic Tuning for Petascale Systems"},{"key":"13","doi-asserted-by":"crossref","DOI":"10.1145\/1504176.1504194","article-title":"openmp to gpgpu: a compiler framework for automatic translation and optimization","author":"lee","year":"2009","journal-title":"Proc of the ACM Symposium on Principles and Practice of Parallel Programming (PPOPP'09)"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1145\/1346281.1346318"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2010.158"},{"year":"0","key":"12"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1145\/1250734.1250753"},{"journal-title":"Torch5 library","year":"0","key":"3"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1145\/1168857.1168898"},{"year":"0","key":"2"},{"journal-title":"CUDA Data Parallel Primitives Library","year":"0","key":"1"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1145\/1375527.1375571"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/ICPR.2008.4761112"},{"key":"6","article-title":"a map reduce framework for programming graphics processors","author":"catanzaro","year":"2008","journal-title":"Proc of Workshop on Software Tools for Multi-core Systems (STMCS06)"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1145\/1186562.1015800"},{"journal-title":"AMD Stream Computing SDK","year":"0","key":"4"},{"key":"9","doi-asserted-by":"crossref","first-page":"1","DOI":"10.3233\/SAT190014","article-title":"translating pseudo-boolean constraints into sat","volume":"2","author":"een","year":"2006","journal-title":"Journal on Satisfiability Boolean Modeling and Computation"},{"year":"0","key":"8"}],"event":{"name":"Distributed Processing (IPDPS)","start":{"date-parts":[[2009,5,23]]},"location":"Rome, Italy","end":{"date-parts":[[2009,5,29]]}},"container-title":["2009 IEEE International Symposium on Parallel & Distributed Processing"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5136864\/5160846\/05161039.pdf?arnumber=5161039","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,2,11]],"date-time":"2025-02-11T05:35:03Z","timestamp":1739252103000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5161039\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,5]]},"references-count":21,"URL":"https:\/\/doi.org\/10.1109\/ipdps.2009.5161039","relation":{},"subject":[],"published":{"date-parts":[[2009,5]]}}}