{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,19]],"date-time":"2026-03-19T11:13:05Z","timestamp":1773918785805,"version":"3.50.1"},"reference-count":15,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010]]},"DOI":"10.1109\/ipdps.2010.5470423","type":"proceedings-article","created":{"date-parts":[[2010,6,2]],"date-time":"2010-06-02T20:25:07Z","timestamp":1275510307000},"page":"1-11","source":"Crossref","is-referenced-by-count":45,"title":["Optimal loop unrolling for GPGPU programs"],"prefix":"10.1109","author":[{"given":"Giridhar Sreenivasa","family":"Murthy","sequence":"first","affiliation":[]},{"given":"Mahesh","family":"Ravishankar","sequence":"additional","affiliation":[]},{"given":"Muthu Manikandan","family":"Baskaran","sequence":"additional","affiliation":[]},{"given":"P.","family":"Sadayappan","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/197320.197366"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.1997.645832"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-61053-7_53"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/1375527.1375562"},{"key":"ref14","first-page":"1","article-title":"A cross-input adaptive framework for gpu program optimizations","author":"liu","year":"2009","journal-title":"International Parallel and Distributed Processing Symposium"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/1356058.1356084"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1023\/A:1012246031671"},{"key":"ref3","year":"0","journal-title":"OpenCL"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2009.5161004"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/QEST.2005.44"},{"key":"ref8","author":"aho","year":"1986","journal-title":"Compilers principles techniques and tools Boston"},{"key":"ref7","year":"0","journal-title":"Decuda"},{"key":"ref2","year":"0","journal-title":"NVIDIA CUDA Documentation"},{"key":"ref1","year":"0","journal-title":"NVIDIA GTX 280"},{"key":"ref9","article-title":"Program optimization strategies for data-parallel many-core processors","author":"ryoo","year":"2008"}],"event":{"name":"2010 IEEE International Symposium on Parallel & Distributed Processing (IPDPS)","location":"Atlanta, GA, USA","start":{"date-parts":[[2010,4,19]]},"end":{"date-parts":[[2010,4,23]]}},"container-title":["2010 IEEE International Symposium on Parallel &amp; Distributed Processing (IPDPS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5465899\/5470342\/05470423.pdf?arnumber=5470423","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,18]],"date-time":"2017-03-18T19:05:43Z","timestamp":1489863943000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5470423\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/ipdps.2010.5470423","relation":{},"subject":[],"published":{"date-parts":[[2010]]}}}