{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T21:01:43Z","timestamp":1725742903667},"reference-count":28,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,4]]},"DOI":"10.1109\/ipdps.2010.5470466","type":"proceedings-article","created":{"date-parts":[[2010,6,2]],"date-time":"2010-06-02T20:25:07Z","timestamp":1275510307000},"page":"1-11","source":"Crossref","is-referenced-by-count":3,"title":["Profitability-based power allocation for speculative multithreaded systems"],"prefix":"10.1109","author":[{"given":"Polychronis","family":"Xekalakis","sequence":"first","affiliation":[]},{"given":"Nikolas","family":"Ioannou","sequence":"additional","affiliation":[]},{"given":"Salman","family":"Khan","sequence":"additional","affiliation":[]},{"given":"Marcelo","family":"Cintra","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/291069.291020"},{"key":"ref11","doi-asserted-by":"crossref","first-page":"838","DOI":"10.1109\/JSSC.2004.842837","article-title":"A 233-MHz 80%-87% Efficiency Four-Phase DC-DC Converter Utilizing Air- Core Inductors on Package","author":"hazucha","year":"2005","journal-title":"Intl Solid-state Circuits Conf"},{"key":"ref12","first-page":"123","article-title":"System Level Analysis of Fast, Per-Core DVFS Using On-Chip Switching Regulators","author":"kim","year":"2008","journal-title":"Intl Symp on High-Performance Computer Architecture"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/277830.277852"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/1122971.1122997"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1990.110213"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/305138.305214"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1997.604684"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/63.974375"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/1088149.1088173"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/1542275.1542333"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/40.888701"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/APEC.2006.1620582"},{"key":"ref3","first-page":"83","article-title":"Wattch: a framework for architectural-level power analysis and optimizations","author":"brooks","year":"2000","journal-title":"Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat No RS00201) ISCA"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2002.995697"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2001.935470"},{"journal-title":"Intel Core2 Duo Processors and Intel Core2 Extreme Processors for Platforms Based on Mobile Intel 965 Express Chipset Family Datasheet","article-title":"Intel Corporation","year":"2008","key":"ref8"},{"year":"0","key":"ref7","article-title":"Intel Turbo Boost Technology in Intel Core Microarchitecture (Nehalem) Based Processors"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555792"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/1283780.1283825"},{"key":"ref1","first-page":"2164","article-title":"A Multi-Stage Interleaved Synchronous Buck Converter with Integrated Output Filter in a 0.18um SiGe Process","author":"abedinpour","year":"2006","journal-title":"Intl Solid-state Circuits Conf"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/1088149.1088178"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/859618.859620"},{"article-title":"SESC simulator","year":"0","author":"renau","key":"ref21"},{"key":"ref24","article-title":"CACTI 4.0. Tech","author":"tarjan","year":"2006","journal-title":"report Compaq Western Research Lab"},{"key":"ref23","doi-asserted-by":"crossref","first-page":"414","DOI":"10.1145\/223982.224451","article-title":"Multiscalar processors","author":"sohi","year":"1995","journal-title":"Proceedings 22nd Annual International Symposium on Computer Architecture ISCA"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2007.4342750"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2007.4601932"}],"event":{"name":"Distributed Processing (IPDPS)","start":{"date-parts":[[2010,4,19]]},"location":"Atlanta, GA","end":{"date-parts":[[2010,4,23]]}},"container-title":["2010 IEEE International Symposium on Parallel & Distributed Processing (IPDPS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5465899\/5470342\/05470466.pdf?arnumber=5470466","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,3,27]],"date-time":"2024-03-27T07:42:37Z","timestamp":1711525357000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5470466\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,4]]},"references-count":28,"URL":"https:\/\/doi.org\/10.1109\/ipdps.2010.5470466","relation":{},"subject":[],"published":{"date-parts":[[2010,4]]}}}