{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,10]],"date-time":"2026-01-10T07:01:08Z","timestamp":1768028468175,"version":"3.49.0"},"reference-count":34,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010]]},"DOI":"10.1109\/ipdps.2010.5470473","type":"proceedings-article","created":{"date-parts":[[2010,6,2]],"date-time":"2010-06-02T20:25:07Z","timestamp":1275510307000},"page":"1-12","source":"Crossref","is-referenced-by-count":26,"title":["A high-performance fault-tolerant software framework for memory on commodity GPUs"],"prefix":"10.1109","author":[{"given":"Naoya","family":"Maruyama","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Akira","family":"Nukada","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Satoshi","family":"Matsuoka","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/24.914544"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1983.1051979"},{"key":"ref31","doi-asserted-by":"crossref","first-page":"1370","DOI":"10.1016\/j.jpdc.2008.05.014","article-title":"A performance study of general-purpose applications on graphics processors using CUDA","volume":"68","author":"che","year":"2008","journal-title":"Journal of Parallel and Distributed Computing"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1145\/1513895.1513907"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/SC.2008.5213210"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2005.69"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2005.37"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/T-ED.1979.19370"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/16.278509"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/4.658626"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/23.556861"},{"key":"ref16","first-page":"37","article-title":"Assessing fault sensitivity in MPI applications","author":"dalu","year":"2004","journal-title":"Supercomputing (SC'04)"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/1375527.1375552"},{"key":"ref18","first-page":"55","article-title":"A hardware redundancy and recovery mechanism for reliable gpgpu","author":"sheaffer","year":"2007","journal-title":"Proceedings of Eurographics\/ACM Graphics Hardware 2007 (GH)"},{"key":"ref19","article-title":"Software-based ECC for GPUs","author":"maruyama","year":"2009","journal-title":"Presented at SAAHPC'09"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/CGO.2005.34"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/1366230.1366276"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.1999.809458"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1186\/1471-2105-8-474"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2005.855685"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1984.1676475"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1147\/rd.282.0124"},{"key":"ref8","doi-asserted-by":"crossref","first-page":"62","DOI":"10.1109\/DSN.2008.4630071","article-title":"Validation of hardware error recovery mechanisms for the sparc64 v microprocessor","author":"ando","year":"2008","journal-title":"Dependable Systems and Networks With FTCS and DCC 2008 DSN 2008 IEEE International Conference on"},{"key":"ref7","article-title":"Soft-error resilience of the ibm power6 processor","author":"kellington","year":"2007","journal-title":"Proceedings of IEEE Workshop on Silicon Errors in Logic - System Effects"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1002\/jcc.20829"},{"key":"ref9","article-title":"Qimonda GDDR5 white — paper","year":"2007"},{"key":"ref1","article-title":"Fast n-body simulation with CUDA","author":"nyland","year":"2007","journal-title":"GPU Gems 3"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1002\/0471792748"},{"key":"ref22","article-title":"NVIDIA CUDA Programming Guide","year":"0"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2008.31"},{"key":"ref24","doi-asserted-by":"crossref","first-page":"73","DOI":"10.1145\/1345206.1345220","article-title":"Optimization principles and application performance evaluation of a multithreaded GPU using CUDA","author":"ryoo","year":"2008","journal-title":"PPoPP '08"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/1365490.1365500"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2006.5"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1145\/1555349.1555372"}],"event":{"name":"2010 IEEE International Symposium on Parallel & Distributed Processing (IPDPS)","location":"Atlanta, GA, USA","start":{"date-parts":[[2010,4,19]]},"end":{"date-parts":[[2010,4,23]]}},"container-title":["2010 IEEE International Symposium on Parallel & Distributed Processing (IPDPS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5465899\/5470342\/05470473.pdf?arnumber=5470473","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T08:58:37Z","timestamp":1497862717000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5470473\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010]]},"references-count":34,"URL":"https:\/\/doi.org\/10.1109\/ipdps.2010.5470473","relation":{},"subject":[],"published":{"date-parts":[[2010]]}}}