{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,16]],"date-time":"2025-05-16T05:48:38Z","timestamp":1747374518428},"reference-count":7,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,3,1]],"date-time":"2023-03-01T00:00:00Z","timestamp":1677628800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,3,1]],"date-time":"2023-03-01T00:00:00Z","timestamp":1677628800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,3]]},"DOI":"10.1109\/irps48203.2023.10117954","type":"proceedings-article","created":{"date-parts":[[2023,5,15]],"date-time":"2023-05-15T17:50:57Z","timestamp":1684173057000},"page":"1-6","source":"Crossref","is-referenced-by-count":3,"title":["A detailed comparison of various off-state breakdown methodologies for scaled Tri-gate technologies"],"prefix":"10.1109","author":[{"given":"K.","family":"Joshi","sequence":"first","affiliation":[{"name":"Logic Technology Development Quality and Reliability, Intel Corporation,Hillsboro,OR,USA,97124"}]},{"given":"D.","family":"Nminibapiel","sequence":"additional","affiliation":[{"name":"Logic Technology Development Quality and Reliability, Intel Corporation,Hillsboro,OR,USA,97124"}]},{"given":"M.","family":"Ghoneim","sequence":"additional","affiliation":[{"name":"Logic Technology Development Quality and Reliability, Intel Corporation,Hillsboro,OR,USA,97124"}]},{"given":"D.","family":"Ali","sequence":"additional","affiliation":[{"name":"Logic Technology Development Quality and Reliability, Intel Corporation,Hillsboro,OR,USA,97124"}]},{"given":"R.","family":"Ramamurthy","sequence":"additional","affiliation":[{"name":"Logic Technology Development Quality and Reliability, Intel Corporation,Hillsboro,OR,USA,97124"}]},{"given":"L.","family":"Pantisano","sequence":"additional","affiliation":[{"name":"Logic Technology Development Quality and Reliability, Intel Corporation,Hillsboro,OR,USA,97124"}]},{"given":"I.","family":"Meric","sequence":"additional","affiliation":[{"name":"Logic Technology Development Quality and Reliability, Intel Corporation,Hillsboro,OR,USA,97124"}]},{"given":"S.","family":"Ramey","sequence":"additional","affiliation":[{"name":"Logic Technology Development Quality and Reliability, Intel Corporation,Hillsboro,OR,USA,97124"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/irps.2016.7574536"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/iirw.2015.7437067"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/irps45951.2020.9129601"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/irps48227.2022.9764519"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/irps.2018.8353575"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/irps46558.2021.9405151"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/relphy.2004.1315306"}],"event":{"name":"2023 IEEE International Reliability Physics Symposium (IRPS)","start":{"date-parts":[[2023,3,26]]},"location":"Monterey, CA, USA","end":{"date-parts":[[2023,3,30]]}},"container-title":["2023 IEEE International Reliability Physics Symposium (IRPS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10117589\/10117581\/10117954.pdf?arnumber=10117954","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,3,1]],"date-time":"2024-03-01T04:45:15Z","timestamp":1709268315000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10117954\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,3]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/irps48203.2023.10117954","relation":{},"subject":[],"published":{"date-parts":[[2023,3]]}}}