{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,21]],"date-time":"2025-05-21T06:10:53Z","timestamp":1747807853769,"version":"3.28.0"},"reference-count":27,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/isca.2002.1003563","type":"proceedings-article","created":{"date-parts":[[2003,6,25]],"date-time":"2003-06-25T16:30:39Z","timestamp":1056558639000},"page":"71-81","source":"Crossref","is-referenced-by-count":2,"title":["An instruction set and microarchitecture for instruction level distributed processing"],"prefix":"10.1109","author":[{"family":"Ho-Seop Kim","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"J.E.","family":"Smith","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/12.931892"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.1997.645806"},{"key":"ref12","first-page":"109","author":"flynn","year":"1995","journal-title":"Computer Architecture Pipelined and Parallel Processor Design"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.1992.697025"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1992.753304"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/5.920580"},{"key":"ref16","first-page":"3","article-title":"DIGITAL FX!32: Combining Emulation and Binary Translation","volume":"9","author":"hookway","year":"1997","journal-title":"Digital Technical Journal"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ICPP.1996.537165"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/40.755465"},{"key":"ref19","article-title":"The Technology Behind Crusoe Processors","author":"klaiber","year":"2000","journal-title":"Transmeta Technical Brief"},{"key":"ref4","article-title":"Evaluating Future Microprocessors: The SimpleScalar Toolset","author":"burger","year":"1996","journal-title":"Tech Report CS-TR-96–1308"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1997.604515"},{"key":"ref3","first-page":"282","article-title":"Piranha: a scalable architecture based on single-chip multiprocessing","author":"barroso","year":"2000","journal-title":"Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat No RS00201) ISCA"},{"key":"ref6","doi-asserted-by":"crossref","first-page":"270","DOI":"10.1109\/ISCA.2000.854397","article-title":"Instruction path coprocessors","author":"yuan chou","year":"2000","journal-title":"Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat No RS00201) ISCA"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.1999.807517"},{"journal-title":"CRAY-2 Central Processor unpublished document circa","year":"1979","key":"ref8"},{"journal-title":"Publication HR-808","year":"1980","key":"ref7"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1147\/rd.341.0012"},{"journal-title":"Publication HR-2000","year":"1985","key":"ref9"},{"key":"ref1","first-page":"248","article-title":"Clock rate versus IPC: the end of the road for conventional microarchitectures","author":"agarwal","year":"2000","journal-title":"Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat No RS00201) ISCA"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/291069.291018"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1997.604689"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2001.991104"},{"key":"ref24","first-page":"199","article-title":"Astronautics ZS-1 Processor","author":"smith","year":"1987","journal-title":"Proc Int l Conf Architectural Support for Programming Languages and Operating Systems"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.1997.645805"},{"key":"ref26","first-page":"414","article-title":"Multiscalar processors","author":"sohi","year":"1995","journal-title":"Proceedings 22nd Annual International Symposium on Computer Architecture ISCA"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/2.917541"}],"event":{"name":"29th Annual International Symposium on Computer Architecture","acronym":"ISCA-02","location":"Anchorage, AK, USA"},"container-title":["Proceedings 29th Annual International Symposium on Computer Architecture"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/7869\/21664\/01003563.pdf?arnumber=1003563","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,15]],"date-time":"2017-06-15T18:38:56Z","timestamp":1497551936000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1003563\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":27,"URL":"https:\/\/doi.org\/10.1109\/isca.2002.1003563","relation":{},"subject":[]}}