{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,17]],"date-time":"2025-09-17T16:28:38Z","timestamp":1758126518655,"version":"3.28.0"},"reference-count":47,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/isca.2004.1310777","type":"proceedings-article","created":{"date-parts":[[2004,11,13]],"date-time":"2004-11-13T00:14:14Z","timestamp":1100304854000},"page":"224-235","source":"Crossref","is-referenced-by-count":15,"title":["iWatcher: efficient architectural support for software debugging"],"prefix":"10.1109","author":[{"family":"Pin Zhou","sequence":"first","affiliation":[]},{"family":"Feng Qin","sequence":"additional","affiliation":[]},{"family":"Wei Liu","sequence":"additional","affiliation":[]},{"family":"Yuanyuan Zhou","sequence":"additional","affiliation":[]},{"given":"J.","family":"Torrellas","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1145\/143365.143508"},{"key":"35","doi-asserted-by":"crossref","DOI":"10.1145\/195473.195575","article-title":"Fine-grain access control for distributed shared memory","author":"schoinas","year":"1994","journal-title":"ASPLOS"},{"journal-title":"Intel Thread Checker","year":"0","key":"17"},{"journal-title":"Valgrind an open-source memory debugger for x86-gnu\/linux","year":"0","author":"seward","key":"36"},{"journal-title":"MIPS RISC Architecture","year":"1992","author":"kane","key":"18"},{"key":"33","doi-asserted-by":"publisher","DOI":"10.1145\/268998.266641"},{"volume":"2","journal-title":"The IA-32 Intel Architecture Software Developer's Manual Volume 2 Instruction Set Reference","year":"2001","key":"15"},{"key":"34","article-title":"Instruction scheduling and executable editing","author":"schnarr","year":"1996","journal-title":"Micro"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1145\/800050.801837"},{"key":"39","doi-asserted-by":"crossref","DOI":"10.1145\/178243.178260","article-title":"ATOM: A system for building customized program analysis tools","author":"srivastava","year":"1994","journal-title":"PLDI"},{"key":"13","article-title":"Tracking down software bugs using automatic anomaly detection","author":"hangal","year":"2002","journal-title":"International Conference on Software Engineering"},{"key":"14","article-title":"Purify: Fast detection of memory leaks and access errors","author":"hastings","year":"1992","journal-title":"USENIX Winter Technical Conference"},{"key":"37","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1995.524580"},{"key":"11","article-title":"StackGhost: Hardware facilitated stack protection","author":"frantzen","year":"2001","journal-title":"USENIX Security Symposium"},{"journal-title":"The SPARC Architecture Manual Version 8","year":"1992","key":"38"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1145\/512529.512539"},{"journal-title":"Capability-Based Computer Systems","year":"1984","author":"levy","key":"21"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1145\/207110.207163"},{"key":"43","article-title":"The superthreaded processor architecture","author":"tsai","year":"1999","journal-title":"IEEE Transactions on Computers"},{"key":"42","doi-asserted-by":"publisher","DOI":"10.1145\/782837.782838"},{"key":"41","doi-asserted-by":"crossref","DOI":"10.1007\/3-540-60385-9_2","article-title":"Automatic verification of the SCI cache coherence protocol","author":"stern","year":"1995","journal-title":"Conference on Correct Hardware Design and Verification Methods"},{"key":"40","first-page":"1","article-title":"A scalable approach to thread-level speculation","author":"steffan","year":"2000","journal-title":"Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat No RS00201) ISCA"},{"key":"45","doi-asserted-by":"publisher","DOI":"10.1145\/605426.605429"},{"key":"44","doi-asserted-by":"publisher","DOI":"10.1145\/155090.155091"},{"key":"47","doi-asserted-by":"publisher","DOI":"10.1145\/859618.859633"},{"key":"46","article-title":"Architecture support for defending against buffer overflow attacks","author":"xu","year":"2002","journal-title":"EASY-2 Workshop"},{"key":"22","article-title":"Architectural support for copy and tamper resistant software","author":"lie","year":"2000","journal-title":"ASPLOS"},{"key":"23","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-45314-8_16"},{"journal-title":"Blueprints for High Availability","year":"2000","author":"marcus","key":"24"},{"key":"25","doi-asserted-by":"publisher","DOI":"10.1145\/1060289.1060297"},{"key":"26","article-title":"Software errors cost U.S. economy $59.5 billion annually","volume":"2002","year":"2002","journal-title":"NIST News Release"},{"key":"27","doi-asserted-by":"publisher","DOI":"10.1145\/503272.503286"},{"key":"28","article-title":"Smashing the stack for fun and profit","author":"one","year":"1996","journal-title":"Phrack Magazine"},{"key":"29","doi-asserted-by":"publisher","DOI":"10.1145\/605397.605417"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1145\/512529.512560"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1177\/109434200001400404"},{"key":"10","doi-asserted-by":"crossref","DOI":"10.1145\/361011.361070","article-title":"Capability-based addressing","author":"fabry","year":"1974","journal-title":"Communications of the ACM"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1145\/178243.178446"},{"key":"30","doi-asserted-by":"publisher","DOI":"10.1002\/(SICI)1097-024X(199701)27:1<87::AID-SPE78>3.0.CO;2-P"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.1997.645821"},{"key":"6","article-title":"StackGuard: Automatic adaptive detection and prevention of buffer-overflow attacks","author":"cowan","year":"1998","journal-title":"Proceedings of the USENIX Security Conference"},{"key":"32","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2003.1206993"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1145\/781131.781157"},{"key":"31","article-title":"Efficient run-time monitoring using shadow processing","author":"patil","year":"1995","journal-title":"Automated and Algorithmic Debugging"},{"key":"4","first-page":"13","article-title":"Architectural support for scalable speculative parallelization in shared-memory multiprocessors","author":"cintra","year":"2000","journal-title":"Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat No RS00201) ISCA"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/ICSE.2000.870435"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1145\/945465.945468"}],"event":{"name":"Proceedings. 31st Annual International Symposium on Computer Architecture, 2004.","location":"Munchen, Germany"},"container-title":["Proceedings. 31st Annual International Symposium on Computer Architecture, 2004."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/9170\/29103\/01310777.pdf?arnumber=1310777","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,15]],"date-time":"2024-01-15T09:01:06Z","timestamp":1705309266000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1310777\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":47,"URL":"https:\/\/doi.org\/10.1109\/isca.2004.1310777","relation":{},"subject":[]}}