{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,6]],"date-time":"2026-06-06T01:11:43Z","timestamp":1780708303125,"version":"3.54.1"},"reference-count":39,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,6]]},"DOI":"10.1109\/isca.2014.6853208","type":"proceedings-article","created":{"date-parts":[[2014,7,29]],"date-time":"2014-07-29T15:19:17Z","timestamp":1406647157000},"page":"193-204","source":"Crossref","is-referenced-by-count":101,"title":["Enabling preemptive multiprogramming on GPUs"],"prefix":"10.1109","author":[{"given":"Ivan","family":"Tanasic","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Isaac","family":"Gelado","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Javier","family":"Cabezas","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Alex","family":"Ramirez","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Nacho","family":"Navarro","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Mateo","family":"Valero","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"19","article-title":"Heterogenious System Architecture: A technical review","author":"kyriazis","year":"2012","journal-title":"AMD"},{"key":"35","first-page":"16","article-title":"MCUDA: An efficient implementation of CUDA kernels for multi-core CPUs","volume":"2008","author":"stratton","year":"2008","journal-title":"LCPC"},{"key":"17","first-page":"17","article-title":"Time-Graph: GPU scheduling for real-time multi-tasking environments","author":"kato","year":"2011","journal-title":"2011 USENIX Annual Technical Conference (USENIX ATC11)"},{"key":"36","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2003.1237999"},{"key":"18","first-page":"37","article-title":"Gdev: First-class GPU resource management in the operating system","volume":"12","author":"kato","year":"2012","journal-title":"USENIX ATC"},{"key":"33","doi-asserted-by":"publisher","DOI":"10.1145\/2366145.2366180"},{"key":"15","year":"2012","journal-title":"Intel 4th Generation Intel Core Processors Are Here"},{"key":"34","article-title":"The parboil benchmarks","author":"stratton","year":"2012","journal-title":"Technical Report IMPACT-12-01"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1109\/RTSS.2011.13"},{"key":"39","author":"zhong","year":"2013","journal-title":"Kernelet High-throughput GPU Kernel Executions with Dynamic Slicing and Scheduling"},{"key":"13","first-page":"69","article-title":"Enabling task parallelism in the CUDA scheduler","author":"guevara","year":"2009","journal-title":"Workshop on Programming Models for Emerging Architectures"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/InPar.2012.6339596"},{"key":"37","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2007.4336221"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2007.30"},{"key":"38","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2011.24"},{"key":"12","first-page":"10","article-title":"Fine-grained resource sharing for concurrent GPGPU kernels","author":"gregg","year":"2012","journal-title":"Proceedings of the 2nd USENIX Conference on Hot Topics in Parallelism USENIX Association"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2008.31"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1109\/ICPP.2011.88"},{"key":"22","doi-asserted-by":"crossref","first-page":"72","DOI":"10.1145\/2366231.2337168","article-title":"Igpu: Exception support and speculative execution on gpus","author":"menon","year":"2012","journal-title":"Proceedings of the 39th Annual International Symposium on Computer Architecture IEEE"},{"key":"23","year":"2012","journal-title":"Next Generation CUDA Computer Architecture Kepler GK110"},{"key":"24","year":"2013","journal-title":"Sharing A GPU between MPI Processes Multi-process Service (MPS) Overview"},{"key":"25","year":"2014","journal-title":"Programming Guide-CUDA Toolkit Documentation"},{"key":"26","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2008.917757"},{"key":"27","doi-asserted-by":"publisher","DOI":"10.1145\/2451116.2451160"},{"key":"28","doi-asserted-by":"publisher","DOI":"10.1145\/2541940.2541942"},{"key":"29","doi-asserted-by":"publisher","DOI":"10.1145\/1996130.1996160"},{"key":"3","year":"2012","journal-title":"AMD AMD A-Series Processor-in-a-Box"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1145\/1572769.1572792"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2008.44"},{"key":"1","first-page":"1","article-title":"The case for GPGPU spatial multitasking, High Performance Computer Architecture (HPCA) 2012","author":"adriaens","year":"2012","journal-title":"IEEE 18th International Symposium On IEEE"},{"key":"30","doi-asserted-by":"publisher","DOI":"10.1145\/2043556.2043579"},{"key":"7","article-title":"Graphic engine resource management","volume":"6818","author":"bautin","year":"2008","journal-title":"SPIE"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/ECRTS.2012.15"},{"key":"32","doi-asserted-by":"crossref","first-page":"36","DOI":"10.1145\/327070.327125","article-title":"Implementation of precise interrupts in pipelined processors","author":"smith","year":"1985","journal-title":"Proceedings of the 12th Annual International Symposium on Computer Architecture Ser ISCA 85"},{"key":"5","year":"2012","journal-title":"ARM ARM Mali"},{"key":"31","year":"2012","journal-title":"Samsung Samsung Exynos"},{"key":"4","year":"2012","journal-title":"AMD AMD Graphics Cores Next (GCN) Architecture White Paper"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2010.13"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2012.2"}],"event":{"name":"2014 ACM\/IEEE 41st International Symposium on Computer Architecture (ISCA)","location":"Minneapolis, MN, USA","start":{"date-parts":[[2014,6,14]]},"end":{"date-parts":[[2014,6,18]]}},"container-title":["2014 ACM\/IEEE 41st International Symposium on Computer Architecture (ISCA)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6847316\/6853187\/06853208.pdf?arnumber=6853208","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,22]],"date-time":"2017-06-22T13:30:57Z","timestamp":1498138257000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6853208\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,6]]},"references-count":39,"URL":"https:\/\/doi.org\/10.1109\/isca.2014.6853208","relation":{},"subject":[],"published":{"date-parts":[[2014,6]]}}}