{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,27]],"date-time":"2026-05-27T22:20:18Z","timestamp":1779920418243,"version":"3.53.1"},"reference-count":36,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,6]]},"DOI":"10.1109\/isca.2014.6853227","type":"proceedings-article","created":{"date-parts":[[2014,7,29]],"date-time":"2014-07-29T19:19:17Z","timestamp":1406661557000},"page":"73-84","source":"Crossref","is-referenced-by-count":46,"title":["Real-world design and evaluation of compiler-managed GPU redundant multithreading"],"prefix":"10.1109","author":[{"given":"Jack","family":"Wadden","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Alexander","family":"Lyashevsky","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Sudhanva","family":"Gurumurthi","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Vilas","family":"Sridharan","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Kevin","family":"Skadron","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"19","author":"mukherjee","year":"2008","journal-title":"Architecture Design for Soft Errors"},{"key":"35","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2011.36"},{"key":"17","doi-asserted-by":"publisher","DOI":"10.1109\/AERO.2002.1035377"},{"key":"36","doi-asserted-by":"publisher","DOI":"10.1145\/2259016.2259035"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2002.1003566"},{"key":"33","author":"villmow","year":"0","journal-title":"AMD OpenCL Compiler"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2012.13"},{"key":"34","doi-asserted-by":"publisher","DOI":"10.1109\/CGO.2007.7"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1049\/ip-e.1986.0022"},{"key":"13","year":"0","journal-title":"Heterogeneous System Architecture Specification"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.98"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2005.38"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/CCGRID.2010.84"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1109\/24.994913"},{"key":"20","author":"nathan","year":"2010","journal-title":"Argus-D A Low-Cost Error Detection Scheme for GPGPUs ser"},{"key":"22","article-title":"Slipstream memory hierarchies","author":"purser","year":"2002","journal-title":"Tech Rep"},{"key":"23","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2005.62"},{"key":"24","doi-asserted-by":"publisher","DOI":"10.1145\/342001.339652"},{"key":"25","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2012.16"},{"key":"26","doi-asserted-by":"publisher","DOI":"10.1145\/1283900.1283902"},{"key":"27","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2002.1028924"},{"key":"28","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2007.98"},{"key":"29","doi-asserted-by":"publisher","DOI":"10.1145\/2370816.2370846"},{"key":"3","year":"0"},{"key":"2","author":"ahern","year":"2011","journal-title":"Scientific Discovery at the Exascale Report from the DOE ASCR 2011 Workshop on Exascale Data Management"},{"key":"10","article-title":"Amds llano fusion apu","author":"foleym steinman","year":"2011","journal-title":"IEEE\/ACM Symposium on High Performance Chips (HOTCHIPS)"},{"key":"1","year":"0"},{"key":"30","year":"0","journal-title":"The OpenCL Specification"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/SC.2012.36"},{"key":"6","year":"2012","journal-title":"Southern Islands Series Instruction Set Architecture"},{"key":"32","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2002.1003565"},{"key":"5","year":"0","journal-title":"AMD OpenCL Accelerated Parallel Processing (APP)"},{"key":"31","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2012.255"},{"key":"4","year":"0"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1145\/1513895.1513907"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2003.1225959"}],"event":{"name":"2014 ACM\/IEEE 41st International Symposium on Computer Architecture (ISCA)","location":"Minneapolis, MN, USA","start":{"date-parts":[[2014,6,14]]},"end":{"date-parts":[[2014,6,18]]}},"container-title":["2014 ACM\/IEEE 41st International Symposium on Computer Architecture (ISCA)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6847316\/6853187\/06853227.pdf?arnumber=6853227","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,23]],"date-time":"2017-03-23T19:48:18Z","timestamp":1490298498000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6853227\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,6]]},"references-count":36,"URL":"https:\/\/doi.org\/10.1109\/isca.2014.6853227","relation":{},"subject":[],"published":{"date-parts":[[2014,6]]}}}