{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,21]],"date-time":"2025-05-21T23:05:02Z","timestamp":1747868702518,"version":"3.28.0"},"reference-count":14,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/iscas.2002.1010394","type":"proceedings-article","created":{"date-parts":[[2003,6,25]],"date-time":"2003-06-25T16:42:54Z","timestamp":1056559374000},"page":"IV-85-IV-88","source":"Crossref","is-referenced-by-count":26,"title":["Evaluation on power reduction applying gated clock approaches"],"prefix":"10.1109","volume":"4","author":[{"given":"G.","family":"Palumbo","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"F.","family":"Pappalardo","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"S.","family":"Sannella","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"crossref","first-page":"415","DOI":"10.1109\/81.841927","article-title":"Clock Gating and Its application to Low Power Design of sequential Circuits","volume":"47","author":"wu","year":"2000","journal-title":"IEEE Trans Circuits Syst I Fund Theory Appl"},{"key":"ref11","article-title":"Programmable Interrupt Controller Intel 8259, Microsystems Components Handbook","volume":"i","year":"1996","journal-title":"Peripherals"},{"volume":"11","journal-title":"Design compiler reference manual","year":"2000","key":"ref12"},{"volume":"11","journal-title":"Power Compiler Reference Manual","year":"2000","key":"ref13"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.1997.628852"},{"journal-title":"Design of High-Performance Microprocessor Circuits","year":"2001","author":"chandrakasan","key":"ref4"},{"journal-title":"Low-Power CMOS VLSI Circuit Design","year":"2000","author":"roy","key":"ref3"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/7384.928306"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/92.845896"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/43.503933"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/54.329451"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4615-2307-9"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4615-2325-3"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/82.592586"}],"event":{"name":"2002 IEEE International Symposium on Circuits and Systems","acronym":"ISCAS-02","location":"Phoenix-Scottsdale, AZ, USA"},"container-title":["2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/7897\/21779\/01010394.pdf?arnumber=1010394","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,15]],"date-time":"2017-06-15T18:39:56Z","timestamp":1497551996000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1010394\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":14,"URL":"https:\/\/doi.org\/10.1109\/iscas.2002.1010394","relation":{},"subject":[]}}