{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,8,6]],"date-time":"2024-08-06T05:47:40Z","timestamp":1722923260736},"reference-count":14,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/iscas.2003.1205070","type":"proceedings-article","created":{"date-parts":[[2003,11,20]],"date-time":"2003-11-20T20:19:26Z","timestamp":1069359566000},"page":"III-518-III-521","source":"Crossref","is-referenced-by-count":2,"title":["Vision systems based on the 128\u00d7128 focal plane cellular visual microprocessor chips"],"prefix":"10.1109","volume":"3","author":[{"given":"A.","family":"Zarandy","sequence":"first","affiliation":[]},{"given":"C.","family":"Rekeczky","sequence":"additional","affiliation":[]},{"given":"L.","family":"Szatmari","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref10","DOI":"10.1109\/81.224308"},{"doi-asserted-by":"publisher","key":"ref11","DOI":"10.1109\/81.747197"},{"doi-asserted-by":"publisher","key":"ref12","DOI":"10.1109\/JSEN.2002.806895"},{"key":"ref13","article-title":"CNN Chip Prototyping and Development Systems","author":"zarandy","year":"1999","journal-title":"European Conference on Circuit Theory and Design – ECCTD'99"},{"doi-asserted-by":"publisher","key":"ref14","DOI":"10.1109\/CNNA.2002.1035096"},{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1109\/ISCAS.1994.409215"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.1109\/82.222815"},{"key":"ref6","article-title":"A 0.8 µm CMOS 2-D programmable mixed-signal focal-plane array-processor with on-chip binary imaging and instructions storage","author":"dorninguez-castro","year":"1997","journal-title":"Vision Chip with Local Logic and Image Memory IEEE J of Solid State Circuits"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1109\/CNNA.1994.381706"},{"doi-asserted-by":"publisher","key":"ref8","DOI":"10.1109\/ICECS.1998.813304"},{"key":"ref7","article-title":"A 176 × 144 processor binary I\/O CNN-UM chip design","author":"paasio","year":"1999","journal-title":"European Conference on Circuit Theory and Design - ECCTD'99 Design Automation Day proceedings (ECCTD'99-DAD)"},{"doi-asserted-by":"publisher","key":"ref2","DOI":"10.1109\/81.222795"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1109\/31.7600"},{"key":"ref9","first-page":"345","article-title":"ACE16k: A Programmable Focal Plane Vision Processor with 128 × 128 Resolution","author":"li\u00f1\u00e1n","year":"2001","journal-title":"ECCTD'01-European Conference on Circuit Theory and Design"}],"event":{"acronym":"ISCAS-03","name":"ISCAS 2003. International Symposium on Circuits and Systems","location":"Bangkok, Thailand"},"container-title":["Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8570\/27130\/01205070.pdf?arnumber=1205070","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,13]],"date-time":"2017-03-13T13:30:22Z","timestamp":1489411822000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1205070\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":14,"URL":"https:\/\/doi.org\/10.1109\/iscas.2003.1205070","relation":{},"subject":[]}}