{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T16:41:54Z","timestamp":1729615314891,"version":"3.28.0"},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/iscas.2003.1206018","type":"proceedings-article","created":{"date-parts":[[2003,10,15]],"date-time":"2003-10-15T12:46:31Z","timestamp":1066221991000},"page":"II-492-II-495","source":"Crossref","is-referenced-by-count":0,"title":["A cost-effective 2-D discrete cosine transform processor with reconfigurable datapath"],"prefix":"10.1109","volume":"2","author":[{"family":"Yeong-Kang Lai","sequence":"first","affiliation":[]},{"family":"Han-Jen Hsu","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/76.401098"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ICASSP.1985.1168211"},{"key":"ref10","first-page":"658","article-title":"A low cost 2-D inverse discrete cosine transform design for image compression","volume":"4","author":"guo","year":"2001","journal-title":"IEEE International Symposium on Circuits and Systems"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/76.143413"},{"key":"ref5","first-page":"158","article-title":"A 100 MHz 2-D 8 × 8 DCT\/IDCT Processor for HDTV Applications","author":"madisetti","year":"1993","journal-title":"IEEE Transactions on Circuits and Systems for Video Technology"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1007\/BF01581292"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/4.126536"},{"key":"ref2","first-page":"1515","article-title":"Polynomial trans - form computation of 2-D DCT","author":"duhamel","year":"1955","journal-title":"Proc ICASSP"},{"key":"ref9","first-page":"254","article-title":"200 MHz compression macrocells using low-swing differential logic","author":"matsui","year":"1994","journal-title":"In ISSCC Dig Tech Papers"},{"key":"ref1","doi-asserted-by":"crossref","first-page":"459","DOI":"10.1109\/76.585925","article-title":"A cost-effective architecture for 8 × 8 two-dimensional DCT\/IDCT using direct method","volume":"7","author":"lee","year":"1997","journal-title":"IEEE Transactions on Circuits and Systems for Video Technology"}],"event":{"name":"ISCAS 2003. International Symposium on Circuits and Systems","acronym":"ISCAS-03","location":"Bangkok, Thailand"},"container-title":["Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8570\/27136\/01206018.pdf?arnumber=1206018","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,15]],"date-time":"2017-06-15T21:22:41Z","timestamp":1497561761000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1206018\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/iscas.2003.1206018","relation":{},"subject":[]}}