{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T11:35:19Z","timestamp":1725708919977},"reference-count":4,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/iscas.2005.1464644","type":"proceedings-article","created":{"date-parts":[[2005,7,27]],"date-time":"2005-07-27T17:52:28Z","timestamp":1122486748000},"page":"540-543","source":"Crossref","is-referenced-by-count":6,"title":["Synthesis of Reconfigurable Multiplier Blocks: Part II-Algorithm"],"prefix":"10.1109","author":[{"given":"S.S.","family":"Demirsoy","sequence":"first","affiliation":[]},{"given":"I.","family":"Kale","sequence":"additional","affiliation":[]},{"given":"A.G.","family":"Dempster","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"3","DOI":"10.1109\/ACSSC.2004.1399175"},{"year":"2003","author":"demirsoy","article-title":"complexity reduction in digital filters and filter banks","key":"2"},{"doi-asserted-by":"publisher","key":"1","DOI":"10.1109\/ISCAS.2005.1464643"},{"doi-asserted-by":"publisher","key":"4","DOI":"10.1109\/82.466647"}],"event":{"name":"2005 IEEE International Symposium on Circuits and Systems","location":"Kobe, Japan"},"container-title":["2005 IEEE International Symposium on Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/9898\/31469\/01464644.pdf?arnumber=1464644","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,14]],"date-time":"2017-03-14T23:24:40Z","timestamp":1489533880000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1464644\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":4,"URL":"https:\/\/doi.org\/10.1109\/iscas.2005.1464644","relation":{},"subject":[]}}