{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T07:04:09Z","timestamp":1730271849742,"version":"3.28.0"},"reference-count":9,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/iscas.2005.1465720","type":"proceedings-article","created":{"date-parts":[[2005,7,27]],"date-time":"2005-07-27T13:52:28Z","timestamp":1122472348000},"page":"4855-4858","source":"Crossref","is-referenced-by-count":0,"title":["New Graph Transformation Schemes in Graph-based Memory Allocation Method for an Indirect Addressing DSP"],"prefix":"10.1109","author":[{"given":"N.","family":"Sugino","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"T.","family":"Matsuura","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"A.","family":"Nishihara","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"3","first-page":"2562","article-title":"dsp code optimization methods utilizing addressing operations at the codes without memory accesses","volume":"e80 a","author":"sugino","year":"1997","journal-title":"IEICE Trans Fundamentals"},{"key":"2","first-page":"1217","article-title":"dsp code optimization utilizing memory addressing operation","volume":"e79 a","author":"sugino","year":"1996","journal-title":"IEICE Trans Fundamentals"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/APCAS.1996.569229"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.1991.176266"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1996.569409"},{"key":"5","article-title":"new cost evaluation schemes in a graph-based memory allocation method for an indirect addressing dsp","author":"sugino","year":"2001","journal-title":"Proc of ECCTD 2001 pp II-221-224"},{"key":"4","first-page":"420","article-title":"memory allocation method for indirect addressing dsps with 2 update operations","volume":"e81 a","author":"kogure","year":"1998","journal-title":"IEICE Trans Fundamentals"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/APCCAS.1998.743807"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.1997.621465"}],"event":{"name":"2005 IEEE International Symposium on Circuits and Systems","location":"Kobe, Japan"},"container-title":["2005 IEEE International Symposium on Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/9898\/31469\/01465720.pdf?arnumber=1465720","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,14]],"date-time":"2017-03-14T20:56:05Z","timestamp":1489524965000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1465720\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/iscas.2005.1465720","relation":{},"subject":[]}}