{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T13:48:33Z","timestamp":1725630513942},"reference-count":13,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/iscas.2005.1465969","type":"proceedings-article","created":{"date-parts":[[2005,7,27]],"date-time":"2005-07-27T13:52:28Z","timestamp":1122472348000},"page":"5850-5853","source":"Crossref","is-referenced-by-count":5,"title":["The Improvement for Transaction Level Verification Functional Coverage"],"prefix":"10.1109","author":[{"family":"Wang Zhong-hai","sequence":"first","affiliation":[]},{"family":"Ye Yi-zheng","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/ICSE.1993.346035"},{"key":"11","first-page":"170","author":"chonnad","year":"2000","journal-title":"A Layered Approach to Behavioral Modeling of Bus Protocols"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/32.21762"},{"year":"0","key":"3"},{"key":"2","first-page":"369","author":"zhang","year":"2000","journal-title":"A data flow fault coverage metric for validation of behavioral HDL descriptions ICCAD'00"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2002.808438"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1145\/944645.944651"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2002.1047740"},{"key":"6","article-title":"transaction level modelling of soc with systemc 2.0","author":"pasricha","year":"2002","journal-title":"Synopsys User Group Conference"},{"key":"5","first-page":"20224","article-title":"verification of a complex soc: the pro3 case-study","author":"fotis andritsopoulos","year":"2003","journal-title":"DATE"},{"key":"4","first-page":"199","author":"jindal","year":"2003","journal-title":"Verification of Transaction-Level SystemC models using RTL Testbenches MEMOCODE"},{"journal-title":"Streamling HDL Code Coverage Analysis Integrated Systems Design","year":"1998","author":"forde","key":"9"},{"journal-title":"DAI introduces Test-Generation Tool EE Times","year":"1998","author":"goering","key":"8"}],"event":{"name":"2005 IEEE International Symposium on Circuits and Systems","location":"Kobe, Japan"},"container-title":["2005 IEEE International Symposium on Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/9898\/31469\/01465969.pdf?arnumber=1465969","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,14]],"date-time":"2017-03-14T21:41:22Z","timestamp":1489527682000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1465969\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/iscas.2005.1465969","relation":{},"subject":[]}}