{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T05:18:41Z","timestamp":1729660721420,"version":"3.28.0"},"reference-count":13,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/iscas.2006.1692741","type":"proceedings-article","created":{"date-parts":[[2006,9,22]],"date-time":"2006-09-22T13:01:13Z","timestamp":1158930073000},"page":"939-942","source":"Crossref","is-referenced-by-count":0,"title":["An Open-Source Based DSP with Enhanced Multimedia-Processing Capacity for Embedded Applications"],"prefix":"10.1109","author":[{"family":"Songping Mai","sequence":"first","affiliation":[]},{"family":"Kun Yang","sequence":"additional","affiliation":[]},{"family":"Wenli Lan","sequence":"additional","affiliation":[]},{"family":"Chun Zhang","sequence":"additional","affiliation":[]},{"family":"Zhihua Wang","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"year":"0","key":"13"},{"key":"11","first-page":"1660","article-title":"Smart cache: An energy-efficient D-cache for a software MPEG-2 video decoder","volume":"3","author":"yang","year":"2003","journal-title":"Proc of Joint Conference of the 4th International Conferenoe on Information Communications and Signal Processing and the 4th Pacific Rim Conference on Multimedia"},{"journal-title":"Computer Architecture A Quantitative Approach","year":"2002","author":"hennessy","key":"12"},{"journal-title":"OpenRISC 1000 OpenRISC 1200","year":"2005","key":"3"},{"year":"0","key":"2"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/ICVD.2004.1260971"},{"key":"10","doi-asserted-by":"crossref","first-page":"499","DOI":"10.1109\/MMSE.2004.34","article-title":"Cache Optimization for Mobile Devices Running Multimedia Applications","author":"asaduzzaman","year":"2004","journal-title":"Proc Int Symp Multimedia Software Engineering"},{"journal-title":"WISHBONE Revision B 3 Specification","year":"2005","author":"herveille","key":"7"},{"journal-title":"A RISC CPU core written in VHDL","year":"2005","key":"6"},{"journal-title":"Free Resources for System on Chip","year":"2005","key":"5"},{"journal-title":"F-CPU","year":"2005","key":"4"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2004.1269082"},{"year":"0","key":"8"}],"event":{"name":"2006 IEEE International Symposium on Circuits and Systems","acronym":"ISCAS-06","location":"Island of Kos, Greece"},"container-title":["2006 IEEE International Symposium on Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/11145\/35661\/01692741.pdf?arnumber=1692741","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,17]],"date-time":"2017-06-17T05:30:34Z","timestamp":1497677434000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1692741\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/iscas.2006.1692741","relation":{},"subject":[]}}