{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T07:06:38Z","timestamp":1730271998090,"version":"3.28.0"},"reference-count":15,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/iscas.2006.1693026","type":"proceedings-article","created":{"date-parts":[[2006,9,22]],"date-time":"2006-09-22T17:01:13Z","timestamp":1158944473000},"page":"4","source":"Crossref","is-referenced-by-count":0,"title":["High performance clock routing in X-architecture"],"prefix":"10.1109","author":[{"family":"Weixiang Shena","sequence":"first","affiliation":[]},{"family":"Yici Caia","sequence":"additional","affiliation":[]},{"family":"Jiang Hu","sequence":"additional","affiliation":[]},{"family":"Xianlong Honga","sequence":"additional","affiliation":[]},{"family":"Bing Lu","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"15","doi-asserted-by":"publisher","DOI":"10.1145\/639929.639944"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/43.924825"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1145\/505348.505355"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.1995.523734"},{"key":"12","article-title":"Fitted Elmore Delay: A simple and accurate interconnect delay model","author":"ishaq","year":"2002","journal-title":"IEEE International Conference on Computer Design"},{"year":"0","key":"3"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1992.227749"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/ASIC.1992.270316"},{"key":"10","first-page":"247","article-title":"The Steiner Minimal Tree Problem in the ?-geometry Plane","volume":"lncs 1178","author":"lee","year":"1996","journal-title":"Algorithms and Computation"},{"key":"7","article-title":"Non-Manhattan Routing","author":"koh","year":"0","journal-title":"IEEE Transactions Computer-Aided Design"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1145\/1119772.1119957"},{"key":"5","first-page":"400","article-title":"UST\/DME: A clock tree routing for general skew constrains","author":"chung-wen albert","year":"2000","journal-title":"IEEE\/ACM International Conference on Computer-Aided Design"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.1995.521489"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1145\/505348.505355"},{"year":"0","key":"8"}],"event":{"name":"2006 IEEE International Symposium on Circuits and Systems","acronym":"ISCAS-06","location":"Island of Kos, Greece"},"container-title":["2006 IEEE International Symposium on Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/11145\/35661\/01693026.pdf?arnumber=1693026","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,14]],"date-time":"2017-03-14T20:22:29Z","timestamp":1489522949000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1693026\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/iscas.2006.1693026","relation":{},"subject":[]}}