{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T10:08:10Z","timestamp":1725530890207},"reference-count":1,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009,5]]},"DOI":"10.1109\/iscas.2009.5117870","type":"proceedings-article","created":{"date-parts":[[2009,7,1]],"date-time":"2009-07-01T14:59:27Z","timestamp":1246460367000},"page":"787-787","source":"Crossref","is-referenced-by-count":0,"title":["POSA: Power-state-aware buffered tree construction"],"prefix":"10.1109","author":[{"given":"Iris Hui-Ru","family":"Jiang","sequence":"first","affiliation":[]},{"given":"Ming-Hua","family":"Wu","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2008.4751835"}],"event":{"name":"2009 IEEE International Symposium on Circuits and Systems - ISCAS 2009","start":{"date-parts":[[2009,5,24]]},"location":"Taipei, Taiwan","end":{"date-parts":[[2009,5,27]]}},"container-title":["2009 IEEE International Symposium on Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5076158\/5117665\/05117870.pdf?arnumber=5117870","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,17]],"date-time":"2017-03-17T17:24:07Z","timestamp":1489771447000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5117870\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,5]]},"references-count":1,"URL":"https:\/\/doi.org\/10.1109\/iscas.2009.5117870","relation":{},"subject":[],"published":{"date-parts":[[2009,5]]}}}