{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,1]],"date-time":"2025-05-01T18:45:30Z","timestamp":1746125130278,"version":"3.28.0"},"reference-count":18,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,5]]},"DOI":"10.1109\/iscas.2010.5537429","type":"proceedings-article","created":{"date-parts":[[2010,8,9]],"date-time":"2010-08-09T18:13:20Z","timestamp":1281377600000},"page":"853-856","source":"Crossref","is-referenced-by-count":22,"title":["A direct bitstream manipulation approach for Virtex4-based evolvable systems"],"prefix":"10.1109","author":[{"given":"Fabio","family":"Cancare","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Marco D.","family":"Santambrogio","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Donatella","family":"Sciuto","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"journal-title":"Early Access Partial Reconfiguration Guide","year":"2008","key":"ref10"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/EH.1999.785430"},{"key":"ref12","doi-asserted-by":"crossref","first-page":"56","DOI":"10.1007\/11549703_6","article-title":"Evolving Hardware by Dynamically Reconfiguring Xilinx FPGAs","volume":"3637","author":"upegui","year":"2005","journal-title":"Lecture Notes in Computer Science"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2007.4488542"},{"key":"ref14","article-title":"FPGA-based Systems for Evolvable Hardware","volume":"12","author":"lambert","year":"2006","journal-title":"Transactions on Engineering Computing and Technology"},{"journal-title":"XPS HWICAP Product Specification","year":"2009","key":"ref15"},{"key":"ref16","article-title":"A Highly Parallel FPGA-based Evolvable Hardware Architecture","author":"cancare","year":"2009","journal-title":"Proc Int Conf Parallel Comp"},{"key":"ref17","first-page":"1135","article-title":"An Empirical Study of the Efficiency of Learning Boolean Functions Using a Cartesian Genetic Programming Approach","volume":"2","author":"miller","year":"1999","journal-title":"Proceedings of the Genetic and Evolutionary Computation Conference"},{"key":"ref18","first-page":"256","article-title":"Global Control of the Cart and Pole System","author":"wang","year":"2007","journal-title":"IEEE Int Conf on Control Applications"},{"journal-title":"Virtex-4 FPGA User Guide","year":"2008","key":"ref4"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/4235.788489"},{"key":"ref6","doi-asserted-by":"crossref","first-page":"390","DOI":"10.1007\/3-540-63173-9_61","article-title":"An Evolved Circuit, Intrinsic in Silicon, Entwined with Physics","volume":"1259","author":"thompson","year":"1996","journal-title":"Lecture Notes in Computer Science"},{"key":"ref5","doi-asserted-by":"crossref","first-page":"821","DOI":"10.1007\/978-3-540-30117-2_83","article-title":"An Evolvable Hardware Tutorial","volume":"3203","author":"torresen","year":"2004","journal-title":"Lecture Notes in Computer Science"},{"key":"ref8","doi-asserted-by":"crossref","first-page":"186","DOI":"10.1007\/3-540-36553-2_17","article-title":"Virtual Reconfigurable Circuits for Real-world Applications of Evolvable Hardware","volume":"1","author":"sekanina","year":"2003","journal-title":"Lecture Notes in Computer Science"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/EH.2000.869357"},{"key":"ref2","first-page":"417","article-title":"Evolving Hardware with Genetic Learning: A First Step Towards Building a Darwin Machine","author":"higuchi","year":"1993","journal-title":"Proceedings of Int Conf on from Animals to Animats"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-7091-7533-0_64"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/1265949.1265954"}],"event":{"name":"2010 IEEE International Symposium on Circuits and Systems - ISCAS 2010","start":{"date-parts":[[2010,5,30]]},"location":"Paris, France","end":{"date-parts":[[2010,6,2]]}},"container-title":["Proceedings of 2010 IEEE International Symposium on Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5512009\/5536941\/05537429.pdf?arnumber=5537429","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T08:20:04Z","timestamp":1497860404000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5537429\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,5]]},"references-count":18,"URL":"https:\/\/doi.org\/10.1109\/iscas.2010.5537429","relation":{},"subject":[],"published":{"date-parts":[[2010,5]]}}}