{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,24]],"date-time":"2025-08-24T00:01:12Z","timestamp":1755993672225,"version":"3.44.0"},"reference-count":5,"publisher":"IEEE","license":[{"start":{"date-parts":[[2010,5,1]],"date-time":"2010-05-01T00:00:00Z","timestamp":1272672000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2010,5,1]],"date-time":"2010-05-01T00:00:00Z","timestamp":1272672000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,5]]},"DOI":"10.1109\/iscas.2010.5537547","type":"proceedings-article","created":{"date-parts":[[2010,8,9]],"date-time":"2010-08-09T18:13:20Z","timestamp":1281377600000},"page":"4305-4308","source":"Crossref","is-referenced-by-count":7,"title":["A novel MUX-FF circuit for low power and high speed serial link interfaces"],"prefix":"10.1109","author":[{"given":"Wei-Yu","family":"Tsai","sequence":"first","affiliation":[{"name":"Department of Electrical Engineering National Tsing Hua University Hsinchu, Tarwan 30013, R.O.C."}]},{"given":"Ching-Te","family":"Chiu","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering National Tsing Hua University Hsinchu, Tarwan 30013, R.O.C."}]},{"given":"Jen-Ming","family":"Wu","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering National Tsing Hua University Hsinchu, Tarwan 30013, R.O.C."}]},{"given":"Shuo-Hung","family":"Hsu","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering National Tsing Hua University Hsinchu, Tarwan 30013, R.O.C."}]},{"given":"Yar-Sun","family":"Hsu","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering National Tsing Hua University Hsinchu, Tarwan 30013, R.O.C."}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/4.924861"},{"key":"ref3","first-page":"152","article-title":"40 Gb\/s 4:1 MUX\/1:4 DEMUX in 90 nm standard CMOS","author":"kanda","year":"2005","journal-title":"IEEE ISSCC"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2004.833663"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.818297"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/4.34073"}],"event":{"name":"2010 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2010,5,30]]},"location":"Paris, France","end":{"date-parts":[[2010,6,2]]}},"container-title":["2010 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5512009\/5536941\/05537547.pdf?arnumber=5537547","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,8,23]],"date-time":"2025-08-23T00:07:33Z","timestamp":1755907653000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/5537547\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,5]]},"references-count":5,"URL":"https:\/\/doi.org\/10.1109\/iscas.2010.5537547","relation":{},"subject":[],"published":{"date-parts":[[2010,5]]}}}