{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T18:28:56Z","timestamp":1729621736699,"version":"3.28.0"},"reference-count":16,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,5]]},"DOI":"10.1109\/iscas.2010.5537896","type":"proceedings-article","created":{"date-parts":[[2010,8,9]],"date-time":"2010-08-09T18:13:20Z","timestamp":1281377600000},"page":"3341-3344","source":"Crossref","is-referenced-by-count":8,"title":["Automated placement of reconfigurable regions for relocatable modules"],"prefix":"10.1109","author":[{"given":"Tobias","family":"Becker","sequence":"first","affiliation":[]},{"given":"Markus","family":"Koester","sequence":"additional","affiliation":[]},{"given":"Wayne","family":"Luk","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2005.380"},{"key":"ref11","doi-asserted-by":"crossref","first-page":"606","DOI":"10.1007\/978-3-540-45234-8_59","article-title":"A reconfigurable platform for real-time embedded video image processing","author":"sedcole","year":"2003","journal-title":"Field-Programmable Logic and Applications"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2007.4380668"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2007.51"},{"key":"ref14","first-page":"24","article-title":"Non-preemptive multitasking on FPGA: Task placement and footprint transform","author":"walder","year":"0","journal-title":"International Conference on engineering of reconfigurable systems and algorithms"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2005.1515715"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-00641-8_5"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/54.825678"},{"journal-title":"Virtex-5 Family Platfrom Overview LX and LXT Platforms v2 2","year":"2007","key":"ref3"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1049\/ip-cdt:20050176"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2004.99"},{"key":"ref8","doi-asserted-by":"crossref","first-page":"15","DOI":"10.1007\/s11265-006-0017-6","article-title":"The Erlangen Slot Machine: A dynamically reconfigurable FPGA-based computer","volume":"47","author":"majer","year":"2007","journal-title":"Journal of VLSI Signal Processing"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2006.888404"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2006.311188"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2004.842930"},{"key":"ref9","doi-asserted-by":"crossref","first-page":"454","DOI":"10.1007\/978-3-540-30117-2_47","article-title":"On-demand FPGA run-time system for dynamical reconfiguration with adaptive priorities","author":"ullmann","year":"2004","journal-title":"Field-Programmable Logic and Applications"}],"event":{"name":"2010 IEEE International Symposium on Circuits and Systems - ISCAS 2010","start":{"date-parts":[[2010,5,30]]},"location":"Paris, France","end":{"date-parts":[[2010,6,2]]}},"container-title":["Proceedings of 2010 IEEE International Symposium on Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5512009\/5536941\/05537896.pdf?arnumber=5537896","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T08:20:14Z","timestamp":1497860414000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5537896\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,5]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/iscas.2010.5537896","relation":{},"subject":[],"published":{"date-parts":[[2010,5]]}}}