{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T01:26:37Z","timestamp":1725672397966},"reference-count":6,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,5]]},"DOI":"10.1109\/iscas.2010.5537932","type":"proceedings-article","created":{"date-parts":[[2010,8,9]],"date-time":"2010-08-09T18:13:20Z","timestamp":1281377600000},"page":"3212-3215","source":"Crossref","is-referenced-by-count":5,"title":["A clock network of distributed ADPLLs using an asymmetric comparison strategy"],"prefix":"10.1109","author":[{"given":"A.","family":"Korniienko","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"E.","family":"Colinet","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"G.","family":"Scorletti","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"E.","family":"Blanco","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"D.","family":"Galayko","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"J.","family":"Juillard","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/4.881199"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/71.372779"},{"key":"ref6","article-title":"A Wide Power Supply Range (0.5V&#x2014;1.3V) Wide Tuning Range (500 MHz&#x2014;8 GHz) All Static CMOS All Digital PLL in 65 nm SOI","author":"tierno","year":"2007","journal-title":"Proceedings of ISSCC"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/RME.2009.5201324"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/IWV.2001.923136"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/5.929649"}],"event":{"name":"2010 IEEE International Symposium on Circuits and Systems - ISCAS 2010","start":{"date-parts":[[2010,5,30]]},"location":"Paris, France","end":{"date-parts":[[2010,6,2]]}},"container-title":["Proceedings of 2010 IEEE International Symposium on Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5512009\/5536941\/05537932.pdf?arnumber=5537932","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,18]],"date-time":"2017-03-18T16:57:04Z","timestamp":1489856224000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5537932\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,5]]},"references-count":6,"URL":"https:\/\/doi.org\/10.1109\/iscas.2010.5537932","relation":{},"subject":[],"published":{"date-parts":[[2010,5]]}}}