{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T07:10:38Z","timestamp":1730272238136,"version":"3.28.0"},"reference-count":7,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,5]]},"DOI":"10.1109\/iscas.2011.5937533","type":"proceedings-article","created":{"date-parts":[[2011,7,7]],"date-time":"2011-07-07T13:30:57Z","timestamp":1310045457000},"page":"189-192","source":"Crossref","is-referenced-by-count":1,"title":["An inductor-less 13.5-Gbps 8-mW analog equalizer for multi-channel multi-frequency operation"],"prefix":"10.1109","author":[{"given":"Marcello","family":"Ganzerli","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Luca","family":"Larcher","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Simone","family":"Erba","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Davide","family":"Sanzogni","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","first-page":"986","article-title":"A 10-Gb\/s Receiver With Series Equalizer and On-Chip ISI Monitor in $0.11\\hbox{-}\\mu {\\rm m}$ CMOS","volume":"40","author":"tomita","year":"2005","journal-title":"IEEE JSSC"},{"key":"ref3","first-page":"54","article-title":"A 40Gb\/s Low-Power Analog Equalizer in $0.13\\hbox{-}\\mu {\\rm m}$ CMOS Technology","author":"lu","year":"2008","journal-title":"Symp VLSI Circuits Dig Tech Papers"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2009.5280898"},{"key":"ref5","first-page":"419","article-title":"A $0.18\\hbox{-}\\mu {\\rm m}$ CMOS 3.5-Gb\/s Continuous-Time Adaptive Cable Equalizer Using Enhanced Low-Frequency Gain Control Method","volume":"39","author":"choi","year":"2004","journal-title":"IEEE JSSC"},{"key":"ref7","first-page":"273","article-title":"A 20Gb\/s Adaptive Equalizer in $0.13\\mu {\\rm m}$ CMOS Technology","author":"lee","year":"2006","journal-title":"ISSCC Dig Tech Papers"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2005.1494002"},{"key":"ref1","first-page":"50","article-title":"A 21-Gb\/s 87-mW Transceiver with FFE\/DFE\/Linear Equalizer in 65-nm CMOS Technology","author":"wang","year":"2009","journal-title":"Symp VLSI Circuits Dig Tech Papers"}],"event":{"name":"2011 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2011,5,15]]},"location":"Rio de Janeiro, Brazil","end":{"date-parts":[[2011,5,18]]}},"container-title":["2011 IEEE International Symposium of Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5910713\/5937406\/05937533.pdf?arnumber=5937533","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T06:18:43Z","timestamp":1490077123000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5937533\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,5]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/iscas.2011.5937533","relation":{},"subject":[],"published":{"date-parts":[[2011,5]]}}}