{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T18:51:39Z","timestamp":1725475899356},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,5]]},"DOI":"10.1109\/iscas.2011.5938043","type":"proceedings-article","created":{"date-parts":[[2011,7,7]],"date-time":"2011-07-07T13:30:57Z","timestamp":1310045457000},"page":"2225-2228","source":"Crossref","is-referenced-by-count":1,"title":["Clock distribution models of 3-D integrated systems"],"prefix":"10.1109","author":[{"given":"Ioannis","family":"Savidis","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Vasilis","family":"Pavlidis","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Eby G.","family":"Friedman","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"article-title":"System Interconnection Design Trade-offs in Three-Dimensional Integrated Circuits","year":"2008","author":"weerasekera","key":"ref4"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2009.2026200"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/92.365457"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/5.929649"},{"journal-title":"Circuits Interconnections and Packaging for VLSI","year":"1990","author":"bakoglu","key":"ref11"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/4.726547"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2006.882043"},{"journal-title":"MITLL Low-Power FDSOI CMOS Process Design Guide","year":"2006","key":"ref7"},{"journal-title":"Three-Dimensional Integrated Circuit Design","year":"2009","author":"pavlidis","key":"ref2"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.1987.1270271"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2008.2007473"}],"event":{"name":"2011 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2011,5,15]]},"location":"Rio de Janeiro, Brazil","end":{"date-parts":[[2011,5,18]]}},"container-title":["2011 IEEE International Symposium of Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5910713\/5937406\/05938043.pdf?arnumber=5938043","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T06:30:43Z","timestamp":1490077843000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5938043\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,5]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/iscas.2011.5938043","relation":{},"subject":[],"published":{"date-parts":[[2011,5]]}}}