{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,25]],"date-time":"2026-02-25T21:12:38Z","timestamp":1772053958973,"version":"3.50.1"},"reference-count":11,"publisher":"IEEE","license":[{"start":{"date-parts":[[2012,5,1]],"date-time":"2012-05-01T00:00:00Z","timestamp":1335830400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2012,5,1]],"date-time":"2012-05-01T00:00:00Z","timestamp":1335830400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,5]]},"DOI":"10.1109\/iscas.2012.6271560","type":"proceedings-article","created":{"date-parts":[[2012,8,22]],"date-time":"2012-08-22T12:02:44Z","timestamp":1345636964000},"page":"1604-1607","source":"Crossref","is-referenced-by-count":9,"title":["Memristor circuit for artificial synaptic weighting of pulse inputs"],"prefix":"10.1109","author":[{"given":"Maheshwar Pd.","family":"Sah","sequence":"first","affiliation":[{"name":"Division of Electronics and Information Engineering, Chonbuk National University, Republic of Korea"}]},{"given":"Changju","family":"Yang","sequence":"additional","affiliation":[{"name":"Division of Electronics and Information Engineering, Chonbuk National University, Republic of Korea"}]},{"given":"Hyongsuk","family":"Kim","sequence":"additional","affiliation":[{"name":"Division of Electronics and Information Engineering, Chonbuk National University, Republic of Korea"}]},{"given":"Leon O","family":"Chua","sequence":"additional","affiliation":[{"name":"Electrical Engineering and Computer Sciences, University of California, Berkeley, 94710, USA"}]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/4.597292"},{"key":"2","doi-asserted-by":"crossref","first-page":"1257","DOI":"10.1109\/31.7600","article-title":"Cellular neural networks: Theory","volume":"35","author":"chua","year":"1988","journal-title":"IEEE Trans Circuits and Syst"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2011.2166749"},{"key":"1","first-page":"1194","article-title":"Survey of neural network hardware invited paper","author":"lindsey","year":"1995","journal-title":"Proc of Application and Science of Artificial Neural Networks Con SPIE Vol 2492 Part Two"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1088\/0957-4484\/18\/36\/365202"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1038\/nature06932"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1976.10092"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/TCT.1971.1083337"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2011.2161360"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1002\/adfm.201101935"},{"key":"11","author":"joglekar","year":"2009","journal-title":"The Elusive Memristor Properties of Basic Electrical Circuits"}],"event":{"name":"2012 IEEE International Symposium on Circuits and Systems (ISCAS)","location":"Seoul, Korea (South)","start":{"date-parts":[[2012,5,20]]},"end":{"date-parts":[[2012,5,23]]}},"container-title":["2012 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6257548\/6270389\/06271560.pdf?arnumber=6271560","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,2,25]],"date-time":"2026-02-25T20:55:15Z","timestamp":1772052915000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/6271560\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,5]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/iscas.2012.6271560","relation":{},"subject":[],"published":{"date-parts":[[2012,5]]}}}