{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,28]],"date-time":"2025-10-28T10:39:51Z","timestamp":1761647991718},"reference-count":8,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,5]]},"DOI":"10.1109\/iscas.2012.6272021","type":"proceedings-article","created":{"date-parts":[[2012,8,22]],"date-time":"2012-08-22T16:02:44Z","timestamp":1345651364000},"page":"3262-3265","source":"Crossref","is-referenced-by-count":5,"title":["A novel methodology for power delivery network optimization in 3-D ICs using through-silicon-via technology"],"prefix":"10.1109","author":[{"given":"Bongki","family":"Lee","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Byunggyu","family":"Ahn","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jaehwan","family":"Kim","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Minbeom","family":"Kim","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jongwha","family":"Chong","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2007.358081"},{"key":"2","first-page":"674","article-title":"A study of through-silicon-via impact on the 3-D stacked IC layout","author":"dae hyun","year":"2009","journal-title":"Proc ICCAD IEEE\/ACM Int Conf"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1049\/iet-cdt.2009.0127"},{"key":"7","first-page":"86","article-title":"Power and ground routing","author":"kahng","year":"2010","journal-title":"VLSI Physical Design From Graph Partitioning to Timing Closure"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2002.802271"},{"key":"5","first-page":"1","article-title":"A study of IR-drop noise issues in 3-D ICs with through-silicon-vias","author":"moongon","year":"2010","journal-title":"Proc 3-D Systems Integration Conf"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2010.5419899"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2003.817546"}],"event":{"name":"2012 IEEE International Symposium on Circuits and Systems - ISCAS 2012","start":{"date-parts":[[2012,5,20]]},"location":"Seoul, Korea (South)","end":{"date-parts":[[2012,5,23]]}},"container-title":["2012 IEEE International Symposium on Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6257548\/6270389\/06272021.pdf?arnumber=6272021","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,22]],"date-time":"2017-03-22T01:28:40Z","timestamp":1490146120000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6272021\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,5]]},"references-count":8,"URL":"https:\/\/doi.org\/10.1109\/iscas.2012.6272021","relation":{},"subject":[],"published":{"date-parts":[[2012,5]]}}}