{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,5]],"date-time":"2026-05-05T06:22:55Z","timestamp":1777962175052,"version":"3.51.4"},"reference-count":13,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,5]]},"DOI":"10.1109\/iscas.2013.6572218","type":"proceedings-article","created":{"date-parts":[[2013,8,14]],"date-time":"2013-08-14T11:40:23Z","timestamp":1376480423000},"page":"1817-1820","source":"Crossref","is-referenced-by-count":5,"title":["An ultra-low-power voltage-mode asynchronous WTA-LTA circuit"],"prefix":"10.1109","author":[{"given":"Jorge","family":"Fernandez-Berni","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ricardo","family":"Carmona-Galan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Angel","family":"Rodriquez-Vazquez","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2012.2228394"},{"key":"11","article-title":"A low-power, high-resolution wta utilizing translinear-loop pre-amplifier","author":"hung-yi","year":"2010","journal-title":"Int Conf on Neural Networks"},{"key":"12","first-page":"201","article-title":"A low power current-mode binary-tree wta\/lta circuit for kohonen neural networks","author":"dlugosz","year":"2009","journal-title":"Proc Int Conf Mixed Design of Integrated Circuits and System"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.819169"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1023\/A:1008045108935"},{"key":"1","author":"haykin","year":"1998","journal-title":"Neural Networks A Comprehensive Foundation"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/ECCTD.2005.1523105"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2007.898478"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2008.2007450"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4419-6475-5"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/TSP.2011.6043716"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/ECCTD.2011.6043295"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCS.2009.5206225"}],"event":{"name":"2013 IEEE International Symposium on Circuits and Systems (ISCAS)","location":"Beijing","start":{"date-parts":[[2013,5,19]]},"end":{"date-parts":[[2013,5,23]]}},"container-title":["2013 IEEE International Symposium on Circuits and Systems (ISCAS2013)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6560459\/6571764\/06572218.pdf?arnumber=6572218","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,22]],"date-time":"2017-03-22T17:00:45Z","timestamp":1490202045000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6572218\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,5]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/iscas.2013.6572218","relation":{},"subject":[],"published":{"date-parts":[[2013,5]]}}}