{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T14:42:17Z","timestamp":1725720137760},"reference-count":12,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,6]]},"DOI":"10.1109\/iscas.2014.6865157","type":"proceedings-article","created":{"date-parts":[[2014,7,30]],"date-time":"2014-07-30T17:16:29Z","timestamp":1406740589000},"page":"428-431","source":"Crossref","is-referenced-by-count":8,"title":["Selector devices for 3-D cross-point ReRAM"],"prefix":"10.1109","author":[{"given":"Euijun","family":"Cha","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jiyong","family":"Woo","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Daeseok","family":"Lee","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sangheon","family":"Lee","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hyunsang","family":"Hwang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"3","first-page":"153","article-title":"Multi-layer sidewall wox resistive memory suitable for 3d reram","author":"chien","year":"2012","journal-title":"VLSI Symp Tech Dig"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2012.6479083"},{"key":"10","first-page":"37","article-title":"Varistor-Type bidirectional switch (JMAX>107A\/cm2, selectivity~104) for 3d bipolar resistive memory arrays","author":"lee","year":"2012","journal-title":"Proc VLSI Tech Symp"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2011.6131654"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2012.6478966"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2011.2161601"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2012.2209394"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2007.4419061"},{"key":"9","first-page":"155","article-title":"Ultrathin (<10nm) nb2o5\/nbo2 hybrid memory with both memory and selector characteristics for high density 3d vertically stackable rram applications","author":"kim","year":"2012","journal-title":"VLSI Symp Tech Dig"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2011.2163697"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1149\/1.3478143"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2005.846936"}],"event":{"name":"2014 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2014,6,1]]},"location":"Melbourne VIC, Australia","end":{"date-parts":[[2014,6,5]]}},"container-title":["2014 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6852006\/6865048\/06865157.pdf?arnumber=6865157","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,23]],"date-time":"2017-03-23T16:35:15Z","timestamp":1490286915000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6865157\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,6]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/iscas.2014.6865157","relation":{},"subject":[],"published":{"date-parts":[[2014,6]]}}}