{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T19:48:42Z","timestamp":1729626522564,"version":"3.28.0"},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,6]]},"DOI":"10.1109\/iscas.2014.6865234","type":"proceedings-article","created":{"date-parts":[[2014,7,30]],"date-time":"2014-07-30T17:16:29Z","timestamp":1406740589000},"page":"710-713","source":"Crossref","is-referenced-by-count":2,"title":["An asynchronous sub-two-step quantizer for continuous-time sigma-delta modulators"],"prefix":"10.1109","author":[{"given":"Xiao Liang","family":"Tan","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"P. K.","family":"Chan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"U.","family":"Dasgupta","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2042244"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2047423"},{"key":"10","doi-asserted-by":"crossref","first-page":"1865","DOI":"10.1109\/JSSC.2007.903053","article-title":"A 4-GS\/s 4-bit Flash ADC in 0. 18-?m CMOS","volume":"42","author":"park","year":"2007","journal-title":"IEEE J Solid-State Circuits"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.856282"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2164303"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.884332"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2196730"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2011.2172709"},{"key":"9","doi-asserted-by":"crossref","first-page":"1829","DOI":"10.1109\/TCSI.2009.2037403","article-title":"An asynchronous binary-search aDC architecture with a reduced comparator count","volume":"57","author":"lin","year":"2010","journal-title":"IEEE Trans Circuits Syst I Reg Papers"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2274852"},{"journal-title":"Continuous-time sigma-delta A\/D conversion Fundamentals performance limits and robust implementations","year":"2006","author":"ortmanns","key":"11"}],"event":{"name":"2014 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2014,6,1]]},"location":"Melbourne VIC, Australia","end":{"date-parts":[[2014,6,5]]}},"container-title":["2014 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6852006\/6865048\/06865234.pdf?arnumber=6865234","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,22]],"date-time":"2017-06-22T13:37:29Z","timestamp":1498138649000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6865234\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,6]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/iscas.2014.6865234","relation":{},"subject":[],"published":{"date-parts":[[2014,6]]}}}