{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T08:34:13Z","timestamp":1729672453561,"version":"3.28.0"},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,6]]},"DOI":"10.1109\/iscas.2014.6865639","type":"proceedings-article","created":{"date-parts":[[2014,7,30]],"date-time":"2014-07-30T21:16:29Z","timestamp":1406754989000},"page":"2333-2336","source":"Crossref","is-referenced-by-count":2,"title":["Scalable behavior modeling for SCR based ESD protection structures for circuit simulation"],"prefix":"10.1109","author":[{"given":"Li","family":"Wang","sequence":"first","affiliation":[]},{"given":"Rui","family":"Ma","sequence":"additional","affiliation":[]},{"given":"Chen","family":"Zhang","sequence":"additional","affiliation":[]},{"given":"Zongyu","family":"Dong","sequence":"additional","affiliation":[]},{"given":"Fei","family":"Lu","sequence":"additional","affiliation":[]},{"given":"Albert","family":"Wang","sequence":"additional","affiliation":[]},{"given":"Xin","family":"Wang","sequence":"additional","affiliation":[]},{"given":"Jian","family":"Liu","sequence":"additional","affiliation":[]},{"given":"Siqiang","family":"Fan","sequence":"additional","affiliation":[]},{"given":"He","family":"Tang","sequence":"additional","affiliation":[]},{"given":"Baoyong","family":"Chi","sequence":"additional","affiliation":[]},{"given":"Liji","family":"Wu","sequence":"additional","affiliation":[]},{"given":"T. L.","family":"Ren","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2003.818140"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2004.833613"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/BIPOL.2010.5667913"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2005.850652"},{"key":"7","first-page":"1","article-title":"A scalable verilog-A modeling method for esd protection devices","author":"li","year":"2010","journal-title":"Proc EOS\/ESD Symp"},{"key":"6","doi-asserted-by":"crossref","first-page":"1047","DOI":"10.1109\/TCAD.2005.855948","article-title":"Compact modeling of on-chip esd protection devices using verilog-A","volume":"25","author":"li","year":"2006","journal-title":"IEEE Trans CAD of Integrated Circuits and Systems"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/101.583606"},{"key":"4","first-page":"28","article-title":"Whole-chip esd protection design verification by cad","author":"lin","year":"2009","journal-title":"Proc EOS\/ESD Symp"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2004.841860"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2005.846824"},{"key":"11","doi-asserted-by":"crossref","first-page":"995","DOI":"10.1109\/JSSC.2003.811978","article-title":"A mixed-mode esd protection circuit simulation-design methodology","volume":"38","author":"feng","year":"2003","journal-title":"IEEE J Solid-State Circuits"}],"event":{"name":"2014 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2014,6,1]]},"location":"Melbourne VIC, Australia","end":{"date-parts":[[2014,6,5]]}},"container-title":["2014 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6852006\/6865048\/06865639.pdf?arnumber=6865639","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,22]],"date-time":"2017-06-22T17:37:33Z","timestamp":1498153053000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6865639\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,6]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/iscas.2014.6865639","relation":{},"subject":[],"published":{"date-parts":[[2014,6]]}}}