{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T05:40:52Z","timestamp":1729662052107,"version":"3.28.0"},"reference-count":20,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,5]]},"DOI":"10.1109\/iscas.2015.7168658","type":"proceedings-article","created":{"date-parts":[[2015,7,30]],"date-time":"2015-07-30T21:31:36Z","timestamp":1438291896000},"page":"413-416","source":"Crossref","is-referenced-by-count":0,"title":["ARCHER: Communication-based predictive architecture selection for application specific multiprocessor Systems-on-Chip"],"prefix":"10.1109","author":[{"given":"Jude Angelo","family":"Ambrose","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Nick","family":"Higgins","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mrinal","family":"Chakravarthy","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shivam","family":"Garg","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tuo","family":"Li","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Daniel","family":"Murphy","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Aleksandar","family":"Ignjatovic","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sri","family":"Parameswaran","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1002\/nme.1149"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1016\/j.compeleceng.2013.11.031"},{"key":"ref12","first-page":"811","article-title":"Design methodology for pipelined heteroveneous multiprocessor system","author":"shee","year":"2007","journal-title":"DAC"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ICSAMOS.2010.5642070"},{"key":"ref14","first-page":"38","article-title":"Multi-layer configuration exploration of MPSoCs for streaming applications","author":"mishra","year":"2012","journal-title":"EslSyn"},{"key":"ref15","first-page":"262","article-title":"Micro architectural Design Space Exploration Using an Architecture-Centric Approach","author":"dubach","year":"2007","journal-title":"Micro"},{"journal-title":"ommited for blind review","year":"0","key":"ref16"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2008.4484671"},{"key":"ref18","doi-asserted-by":"crossref","DOI":"10.1201\/b11156","author":"dhara","year":"2011","journal-title":"Optimality Conditions in Convex Optimization A Finite-Dimensional View CRC Press"},{"year":"2013","key":"ref19","article-title":"MiBench Benchmarks"},{"key":"ref4","first-page":"870","article-title":"A composable, energy-managed, real-time MPSOC plat-form","author":"molnos","year":"2010","journal-title":"Optim"},{"year":"2013","key":"ref3","article-title":"TILERA"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/2.976921"},{"key":"ref5","article-title":"Dynamically Reconfigurable MPSoC Architecture","author":"zhang","year":"0","journal-title":"GLSVLSI 2013"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1007\/s10766-007-0035-4"},{"key":"ref7","article-title":"On-chip Communication Architecture Exploration: A Quantitative Evaluation of Point-to-point, Bus, and Network-on-chip Approaches","volume":"12","author":"lee","year":"2008","journal-title":"ACM Trans Des Autom Electron Syst"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2010.5434077"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2012.6164944"},{"key":"ref9","article-title":"Energy Model of Networks-on-Chip and a Bus","author":"wofkotte","year":"2005","journal-title":"ISS"},{"year":"2014","key":"ref20","article-title":"WCET&#x2019; Bench-marks"}],"event":{"name":"2015 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2015,5,24]]},"location":"Lisbon, Portugal","end":{"date-parts":[[2015,5,27]]}},"container-title":["2015 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7152138\/7168553\/07168658.pdf?arnumber=7168658","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,28]],"date-time":"2019-08-28T22:50:58Z","timestamp":1567032658000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7168658\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,5]]},"references-count":20,"URL":"https:\/\/doi.org\/10.1109\/iscas.2015.7168658","relation":{},"subject":[],"published":{"date-parts":[[2015,5]]}}}