{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,8,19]],"date-time":"2026-08-19T20:22:18Z","timestamp":1787170938834,"version":"build-2736575974"},"reference-count":7,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,5]]},"DOI":"10.1109\/iscas.2015.7168669","type":"proceedings-article","created":{"date-parts":[[2015,7,30]],"date-time":"2015-07-30T17:31:36Z","timestamp":1438277496000},"page":"457-460","source":"Crossref","is-referenced-by-count":8,"title":["Efficient design technique for pulse swallow based fractional-N frequency divider"],"prefix":"10.1109","author":[{"given":"Manas Kumar","family":"Hati","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Tarun K.","family":"Bhattacharyya","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"crossref","first-page":"881","DOI":"10.1109\/TCSII.2009.2035258","article-title":"Fractional-N Phase-Locked-Loop-Based Frequency Synthesis: A Tutorial","volume":"56","author":"su","year":"2009","journal-title":"IEEE Transactions on Circuits and Systems-II Express Briefs"},{"key":"ref3","first-page":"168","article-title":"A High-speed Low-power Pulse-swallow Divider with Robustness Consideration","author":"pan","year":"2008","journal-title":"Proc Int Solid State and Integrated Circuit Technology Conf"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2005.850744"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2007.905653"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/RME.2006.1689958"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1587\/elex.7.856"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/4.841508"}],"event":{"name":"2015 IEEE International Symposium on Circuits and Systems (ISCAS)","location":"Lisbon, Portugal","start":{"date-parts":[[2015,5,24]]},"end":{"date-parts":[[2015,5,27]]}},"container-title":["2015 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7152138\/7168553\/07168669.pdf?arnumber=7168669","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,23]],"date-time":"2017-06-23T12:44:40Z","timestamp":1498221880000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7168669\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,5]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/iscas.2015.7168669","relation":{},"subject":[],"published":{"date-parts":[[2015,5]]}}}