{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T21:47:47Z","timestamp":1729633667349,"version":"3.28.0"},"reference-count":8,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,5]]},"DOI":"10.1109\/iscas.2015.7169100","type":"proceedings-article","created":{"date-parts":[[2015,7,30]],"date-time":"2015-07-30T17:31:36Z","timestamp":1438277496000},"page":"2129-2132","source":"Crossref","is-referenced-by-count":1,"title":["A floorplan-driven high-level synthesis algorithm with multiple-operation chainings based on path enumeration"],"prefix":"10.1109","author":[{"given":"Kotaro","family":"Terada","sequence":"first","affiliation":[]},{"given":"Masao","family":"Yanagisawa","sequence":"additional","affiliation":[]},{"given":"Nozomu","family":"Togawa","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.2197\/ipsjtsldm.4.150"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1093\/ietfec\/e90-a.4.792"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1049\/iet-cdt:20070162"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/APCCAS.2014.7032766"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2007.41"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/AHS.2009.21"},{"key":"ref2","doi-asserted-by":"crossref","first-page":"550","DOI":"10.1109\/TCAD.2004.825872","article-title":"Architecture and synthesis for on-chip multi-cycle communication","volume":"23","author":"cong","year":"2004","journal-title":"IEEE Trans on Computer-Aided Design of Integrated Circuits and Systems"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2012.6272096"}],"event":{"name":"2015 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2015,5,24]]},"location":"Lisbon, Portugal","end":{"date-parts":[[2015,5,27]]}},"container-title":["2015 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7152138\/7168553\/07169100.pdf?arnumber=7169100","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,23]],"date-time":"2017-06-23T12:44:43Z","timestamp":1498221883000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7169100\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,5]]},"references-count":8,"URL":"https:\/\/doi.org\/10.1109\/iscas.2015.7169100","relation":{},"subject":[],"published":{"date-parts":[[2015,5]]}}}