{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,3]],"date-time":"2026-06-03T15:30:49Z","timestamp":1780500649973,"version":"3.54.1"},"reference-count":7,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,5]]},"DOI":"10.1109\/iscas.2015.7169140","type":"proceedings-article","created":{"date-parts":[[2015,7,30]],"date-time":"2015-07-30T21:31:36Z","timestamp":1438291896000},"page":"2289-2292","source":"Crossref","is-referenced-by-count":9,"title":["A digital to time converter with fully digital calibration scheme for ultra-low power ADPLL in 40 nm CMOS"],"prefix":"10.1109","author":[{"given":"Bindi","family":"Wang","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yao-Hong","family":"Liu","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Pieter","family":"Harpe","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Johan","family":"van den Heuvel","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Bo","family":"Liu","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Hao","family":"Gao","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Robert Bogdan","family":"Staszewski","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref4","first-page":"2590","article-title":"An Amplitude Resolution Improvement of an RF-DAC Employing Pulsewidth Modulation","volume":"58","author":"min","year":"2011","journal-title":"IEEE TCAS-I"},{"key":"ref3","first-page":"1","article-title":"Gain Estimation of a Digital-to-Time Converter for Phase-Prediction All-Digital PLL","author":"jingcheng","year":"2013","journal-title":"IEEE ECCTD 2013"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2012.6243855"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2011.5746216"},{"key":"ref7","first-page":"240","article-title":"A 0.004mm2 250mW ??tdc with time-difference accumulator and a 0.012mm2 2.5mW bang-bang digital PLL using PRNG for low-power SoC applications","author":"hong","year":"2012","journal-title":"IEEE ISSCC 2012"},{"key":"ref2","article-title":"A 860uW 2.1&#x2013;2.7GHz All-digital PLL-based Frequency Modulator with a DTC-assisted Snapshot TDC for WPAN (Bluetooth Smart and Zigbee) Applications","author":"chillara","year":"2014","journal-title":"ISSCC Dig Tech Papers to be published"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/RFIC.2013.6569526"}],"event":{"name":"2015 IEEE International Symposium on Circuits and Systems (ISCAS)","location":"Lisbon, Portugal","start":{"date-parts":[[2015,5,24]]},"end":{"date-parts":[[2015,5,27]]}},"container-title":["2015 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7152138\/7168553\/07169140.pdf?arnumber=7169140","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,24]],"date-time":"2017-03-24T19:39:18Z","timestamp":1490384358000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7169140\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,5]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/iscas.2015.7169140","relation":{},"subject":[],"published":{"date-parts":[[2015,5]]}}}