{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,7]],"date-time":"2025-11-07T09:10:13Z","timestamp":1762506613984},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,5]]},"DOI":"10.1109\/iscas.2015.7169209","type":"proceedings-article","created":{"date-parts":[[2015,7,30]],"date-time":"2015-07-30T17:31:36Z","timestamp":1438277496000},"page":"2565-2568","source":"Crossref","is-referenced-by-count":3,"title":["Fractional spur suppression in all-digital phase-locked loops"],"prefix":"10.1109","author":[{"given":"Peng","family":"Chen","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"XiongChuan","family":"Huang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Robert Bogdan","family":"Staszewski","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2011.5746216"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/DCAS.2006.321040"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/RFIC.2014.6851668"},{"key":"ref6","first-page":"172","article-title":"An 860?w 2.1-to-2.7 GHz all-digital PLL-based frequency modulator with a dtc-assisted snapshot tdc for WPAN (Bluetooth smart and Zigbee) applications","author":"chillara","year":"2014","journal-title":"IEEE International Solid-State Circuits Conference (ISSCC)"},{"key":"ref11","doi-asserted-by":"crossref","first-page":"89","DOI":"10.1109\/RFIC.2014.6851666","article-title":"A 9.2–12.7 GHz wideband fractional-n subsampling PLL in 28nm CMOS with 280fs rms jitter","author":"raczkowski","year":"2014","journal-title":"IEEE Radio Frequency Integrated Circuits Symposium"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS.2012.6463539"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2005704"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2314436"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2162769"},{"key":"ref9","first-page":"1","article-title":"Nonlinearity cancellation in digital PLLs","author":"levantino","year":"2013","journal-title":"IEEE Custom Integrated Circuits Conference (CICC)"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.857417"}],"event":{"name":"2015 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2015,5,24]]},"location":"Lisbon, Portugal","end":{"date-parts":[[2015,5,27]]}},"container-title":["2015 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7152138\/7168553\/07169209.pdf?arnumber=7169209","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,28]],"date-time":"2019-08-28T18:50:54Z","timestamp":1567018254000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7169209\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,5]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/iscas.2015.7169209","relation":{},"subject":[],"published":{"date-parts":[[2015,5]]}}}