{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T10:09:42Z","timestamp":1729678182823,"version":"3.28.0"},"reference-count":12,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,5]]},"DOI":"10.1109\/iscas.2015.7169212","type":"proceedings-article","created":{"date-parts":[[2015,7,30]],"date-time":"2015-07-30T21:31:36Z","timestamp":1438291896000},"page":"2577-2580","source":"Crossref","is-referenced-by-count":6,"title":["The noise and spur delusion in fractional-N frequency synthesizer design"],"prefix":"10.1109","author":[{"given":"Michael Peter","family":"Kennedy","sequence":"first","affiliation":[]},{"given":"Hongjia","family":"Mo","sequence":"additional","affiliation":[]},{"given":"Zhida","family":"Li","sequence":"additional","affiliation":[]},{"given":"Guosheng","family":"Hu","sequence":"additional","affiliation":[]},{"given":"Paolo","family":"Scognamiglio","sequence":"additional","affiliation":[]},{"given":"Ettore","family":"Napoli","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TSP.2007.899385"},{"key":"ref3","article-title":"Deterministic Techniques for Minimizing Spurious Tones in Digital Delta-Sigma Modulators","author":"hosseini","year":"2011","journal-title":"New York Springer-Verlag"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1016\/j.jfranklin.2015.01.012"},{"key":"ref6","doi-asserted-by":"crossref","first-page":"881","DOI":"10.1109\/TCSII.2009.2035258","article-title":"Fractional-N Phase-Locked-Loop-Based Frequency Synthesis: A Tutorial","volume":"56","author":"su","year":"2009","journal-title":"IEEE Transactions on Circuits and Systems II"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2011.2164960"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/4.229400"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2013.2285968"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2008.916694"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2004.841594"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2003.819119"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2006.887616"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.800925"}],"event":{"name":"2015 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2015,5,24]]},"location":"Lisbon, Portugal","end":{"date-parts":[[2015,5,27]]}},"container-title":["2015 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7152138\/7168553\/07169212.pdf?arnumber=7169212","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,23]],"date-time":"2017-06-23T16:44:39Z","timestamp":1498236279000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7169212\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,5]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/iscas.2015.7169212","relation":{},"subject":[],"published":{"date-parts":[[2015,5]]}}}