{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T06:43:47Z","timestamp":1725518627447},"reference-count":9,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,5]]},"DOI":"10.1109\/iscas.2016.7527413","type":"proceedings-article","created":{"date-parts":[[2016,11,1]],"date-time":"2016-11-01T20:59:26Z","timestamp":1478033966000},"page":"1006-1009","source":"Crossref","is-referenced-by-count":1,"title":["A process compensated gain cell embedded-DRAM for ultra-low-power variation-aware design"],"prefix":"10.1109","author":[{"given":"Robert","family":"Giterman","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Adam","family":"Teman","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Pascal","family":"Meinerzhagen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Alexander","family":"Fish","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Andreas","family":"Burg","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2007155"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2014.2305016"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2206685"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2013.2252652"},{"journal-title":"Single-Supply 3T Gain-Cell for Low-Voltage Low-Power Applications","year":"2015","author":"giterman","key":"ref8"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2014.6865600"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1049\/joe.2013.0057"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2003.1253179"},{"key":"ref1","article-title":"A 5.4nW\/kB retention power logic-compatible embedded DRAM with 2T dual-Vt gain cell for low power sensing applicaions","author":"lee","year":"2010","journal-title":"Proc IEEE A-SSCC"}],"event":{"name":"2016 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2016,5,22]]},"location":"Montr\u00e9al, QC, Canada","end":{"date-parts":[[2016,5,25]]}},"container-title":["2016 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7515073\/7527154\/07527413.pdf?arnumber=7527413","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,10,14]],"date-time":"2020-10-14T16:18:11Z","timestamp":1602692291000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/7527413"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,5]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/iscas.2016.7527413","relation":{},"subject":[],"published":{"date-parts":[[2016,5]]}}}