{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T07:07:01Z","timestamp":1730272021555,"version":"3.28.0"},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,5]]},"DOI":"10.1109\/iscas.2016.7538909","type":"proceedings-article","created":{"date-parts":[[2016,11,1]],"date-time":"2016-11-01T20:59:26Z","timestamp":1478033966000},"page":"1762-1765","source":"Crossref","is-referenced-by-count":0,"title":["High performance low overhead template-based Cell-Interleave Pipeline (TCIP) for asynchronous-logic QDI circuits"],"prefix":"10.1109","author":[{"given":"Weng-Geng","family":"Ho","sequence":"first","affiliation":[]},{"given":"Nan","family":"Liu","sequence":"additional","affiliation":[]},{"given":"Kyaw Zwa","family":"Lwin Ne","sequence":"additional","affiliation":[]},{"given":"Kwen-Siong","family":"Chong","sequence":"additional","affiliation":[]},{"given":"Bah-Hwee","family":"Gwee","sequence":"additional","affiliation":[]},{"given":"Joseph. S.","family":"Chang","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4612-4476-9_35"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2015.2413759"},{"journal-title":"Digital cell","year":"2013","author":"chang","key":"ref10"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2015.2413757"},{"key":"ref11","first-page":"989","article-title":"A low overhead Quasi-Delay-Insensitive (QDI) asynchronous data path synthesis based on Microcell-Interleaving Genetic Algorithm (MIGA)","volume":"33","author":"zhou","year":"2014","journal-title":"IEEE TCAD"},{"key":"ref5","first-page":"1256","article-title":"The design of high-throughput asynchronous dynamic pipelines: lookahead pipelines","volume":"15","author":"singh","year":"2007","journal-title":"IEEE TVLSI"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2006.875789"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2012.29"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2181678"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1049\/iet-cds.2014.0103"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2011.2159284"}],"event":{"name":"2016 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2016,5,22]]},"location":"Montreal, QC","end":{"date-parts":[[2016,5,25]]}},"container-title":["2016 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7515073\/7527154\/07538909.pdf?arnumber=7538909","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,6,12]],"date-time":"2020-06-12T21:08:01Z","timestamp":1591996081000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/7538909\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,5]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/iscas.2016.7538909","relation":{},"subject":[],"published":{"date-parts":[[2016,5]]}}}