{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,11]],"date-time":"2026-03-11T01:43:16Z","timestamp":1773193396840,"version":"3.50.1"},"reference-count":17,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,5]]},"DOI":"10.1109\/iscas.2017.8050316","type":"proceedings-article","created":{"date-parts":[[2017,9,28]],"date-time":"2017-09-28T16:33:32Z","timestamp":1506616412000},"page":"1-4","source":"Crossref","is-referenced-by-count":27,"title":["Robust 7-nm SRAM design on a predictive PDK"],"prefix":"10.1109","author":[{"given":"Vinay","family":"Vashishtha","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Manoj","family":"Vangala","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Parv","family":"Sharma","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Lawrence T.","family":"Clark","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1117\/12.2011686"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/SISPAD.2011.6035034"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2362842"},{"key":"ref13","first-page":"748","article-title":"Static Noise Margin Analysis of MOS SRAM Cells","volume":"sc 22","author":"seevinck","year":"1978","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2015.7223657"},{"key":"ref15","first-page":"57","article-title":"SRAM Cell Optimization for Low AVT Transistors","author":"clark","year":"2013","journal-title":"Proc ISLPED"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.925405"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2019279"},{"key":"ref4","first-page":"101","article-title":"On the Gate-Stack Origin of Threshold Voltage Variability in Scaled FinFETs and Multi-FinFETs","author":"liu","year":"2009","journal-title":"IEEE Symp VLSI Tech"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2011.2121913"},{"key":"ref6","first-page":"942700 1-10","article-title":"Layout optimization and trade-off between 193i and EUV-based patterning for SRAM cells to improve performance and process variability at 7nm technology node","volume":"9427","author":"sakhare","year":"2015","journal-title":"SPIE Advanced Lithography"},{"key":"ref5","first-page":"159","article-title":"Comprehensive Analysis of Variability Sources of FinFET Characteristics","author":"matsukawa","year":"2009","journal-title":"IEEE Symp VLSI Tech"},{"key":"ref8","first-page":"90530q1","article-title":"Design technology co-optimization for a robust 10nm Metall solution for logic design and SRAM","volume":"9053","author":"vandewalle","year":"2014","journal-title":"SPIE Advanced Lithography"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1117\/12.837495"},{"key":"ref2","article-title":"Matching properties of MOS transistors","volume":"24","author":"pelgom","year":"1989","journal-title":"IEEE J Solid-State Circ"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2016.04.006"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1117\/12.881690"}],"event":{"name":"2017 IEEE International Symposium on Circuits and Systems (ISCAS)","location":"Baltimore, MD, USA","start":{"date-parts":[[2017,5,28]]},"end":{"date-parts":[[2017,5,31]]}},"container-title":["2017 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8014728\/8049747\/08050316.pdf?arnumber=8050316","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,10,27]],"date-time":"2017-10-27T17:35:01Z","timestamp":1509125701000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8050316\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,5]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/iscas.2017.8050316","relation":{},"subject":[],"published":{"date-parts":[[2017,5]]}}}