{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,29]],"date-time":"2026-07-29T01:36:22Z","timestamp":1785288982973,"version":"3.55.0"},"reference-count":15,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018]]},"DOI":"10.1109\/iscas.2018.8351142","type":"proceedings-article","created":{"date-parts":[[2018,5,4]],"date-time":"2018-05-04T22:00:05Z","timestamp":1525471205000},"page":"1-5","source":"Crossref","is-referenced-by-count":44,"title":["Architecture Generator for Type-3 Unum Posit Adder\/Subtractor"],"prefix":"10.1109","author":[{"given":"Manish Kumar","family":"Jaiswal","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Hayden K.-H","family":"So","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","author":"yonemoto","year":"2017","journal-title":"Sigmoid Numbers for Julia"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/CJECE.2008.4721634"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2004.1261822"},{"key":"ref13","first-page":"149","article-title":"Analysis of highperformance floating-point arithmetic on FPGAs","author":"govindu","year":"2004","journal-title":"Proceedings of 18th International Parallel and Distributed Processing Symposium"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/968280.968305"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2006.311302"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/2913029"},{"key":"ref3","author":"gustafson","year":"2017","journal-title":"Beating Floating Point at its Own Game Posit Arithmetic"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/3001758"},{"key":"ref5","author":"brueckner","year":"2015","journal-title":"Slidecast John Gustafson Explains Energy Efficient Unum Computing inside HPC"},{"key":"ref8","first-page":"1","article-title":"IEEE standard for floating-point arithmetic","year":"2008","journal-title":"IEEE Std 754-2008"},{"key":"ref7","author":"gustafson","year":"2017","journal-title":"Beyond Floating Point Next-Generation Computer Arithmetic Stanford EE Computer Systems Colloquium"},{"key":"ref2","article-title":"A radical approach to computation with real numbers","volume":"3","author":"gustafson","year":"2016","journal-title":"Supercomputing Frontiers and Innovations"},{"key":"ref1","author":"gustafson","year":"2015","journal-title":"The End of Error Unum Computing"},{"key":"ref9","author":"jaiswal","year":"2017","journal-title":"Posit Adder HDL Arithmetic"}],"event":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","location":"Florence","start":{"date-parts":[[2018,5,27]]},"end":{"date-parts":[[2018,5,30]]}},"container-title":["2018 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8334884\/8350884\/08351142.pdf?arnumber=8351142","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,10,22]],"date-time":"2019-10-22T00:50:22Z","timestamp":1571705422000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8351142\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/iscas.2018.8351142","relation":{},"subject":[],"published":{"date-parts":[[2018]]}}}