{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T07:12:55Z","timestamp":1730272375880,"version":"3.28.0"},"reference-count":13,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018]]},"DOI":"10.1109\/iscas.2018.8351279","type":"proceedings-article","created":{"date-parts":[[2018,5,4]],"date-time":"2018-05-04T22:00:05Z","timestamp":1525471205000},"page":"1-5","source":"Crossref","is-referenced-by-count":3,"title":["A Hardware Accelerator for Anisotropic Diffusion Filtering in FPGA"],"prefix":"10.1109","author":[{"given":"Guilherme F.","family":"Weidle","sequence":"first","affiliation":[]},{"given":"Felipe","family":"Viel","sequence":"additional","affiliation":[]},{"given":"Douglas R.","family":"de Melo","sequence":"additional","affiliation":[]},{"given":"Cesar A.","family":"Zeferino","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1007\/s11554-016-0625-8"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ICCECE.2016.8009555"},{"journal-title":"Digital Design with RTL Design Verilog and VHDL","year":"2010","author":"vahid","key":"ref12"},{"journal-title":"Floating Point Unit","year":"2006","author":"al-eryani","key":"ref13"},{"key":"ref4","article-title":"Hot chips heralds heterogeneity","volume":"2017","author":"wilson","year":"2017","journal-title":"System Design"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/34.56205"},{"journal-title":"Anisotropic diffusion filter in FPGA","year":"2015","author":"stein","key":"ref6"},{"journal-title":"Filtro de difus&#x00E3;o anisotr&#x00F3;pico orientado por evid&#x00EA;ncia de borda","year":"2009","author":"coser","key":"ref5"},{"journal-title":"Anisotropic Diffusion in Image Processing","year":"1998","author":"weickert","key":"ref8"},{"journal-title":"Um estudo comparativo de implementa&#x00E7;&#x00F5;es do filtro de difus&#x00E3;o anisotr&#x00F3;pico para unidades de processamento CPU e GPU","year":"0","author":"buhr","key":"ref7"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1155\/2016\/3020473"},{"journal-title":"Digital Image Processing","year":"2002","author":"gonzalez","key":"ref1"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/EMBC.2014.6944671"}],"event":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2018,5,27]]},"location":"Florence","end":{"date-parts":[[2018,5,30]]}},"container-title":["2018 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8334884\/8350884\/08351279.pdf?arnumber=8351279","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,10,22]],"date-time":"2019-10-22T00:52:33Z","timestamp":1571705553000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8351279\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/iscas.2018.8351279","relation":{},"subject":[],"published":{"date-parts":[[2018]]}}}