{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T03:01:49Z","timestamp":1725591709413},"reference-count":17,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,5,1]],"date-time":"2019-05-01T00:00:00Z","timestamp":1556668800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,5,1]],"date-time":"2019-05-01T00:00:00Z","timestamp":1556668800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,5,1]],"date-time":"2019-05-01T00:00:00Z","timestamp":1556668800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,5]]},"DOI":"10.1109\/iscas.2019.8702085","type":"proceedings-article","created":{"date-parts":[[2019,5,1]],"date-time":"2019-05-01T21:02:28Z","timestamp":1556744548000},"page":"1-5","source":"Crossref","is-referenced-by-count":2,"title":["An Efficient Numerical Solution Technique for VLSI Interconnect Equations on Many-Core Processors"],"prefix":"10.1109","author":[{"given":"Gines","family":"Domenech-Asensi","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tom J.","family":"Kazmierski","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2421287"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2018.2858014"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1016\/j.future.2003.07.011"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/1824801.1824814"},{"journal-title":"Computer-Aided Analysis of Electronic Circuits Algorithms and Computational Techniques","year":"1975","author":"chua","key":"ref14"},{"journal-title":"Handbook of Differential Equations","year":"1989","author":"zwillinger","key":"ref15"},{"journal-title":"CUDA C Best Practices Guide","year":"2018","key":"ref16"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1049\/el:19920783"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2011.2176124"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/PRIME.2013.6603135"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2009.4796514"},{"journal-title":"CUDA C Programming Guide Version 7 0","year":"0","key":"ref5"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/2966986.2967081"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2009.5280743"},{"key":"ref2","article-title":"SPICE 2: A computer program to stimulate semiconductor circuits","author":"nagel","year":"1975","journal-title":"Ph D Dissertation"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2647853"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2014.2312199"}],"event":{"name":"2019 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2019,5,26]]},"location":"Sapporo, Japan","end":{"date-parts":[[2019,5,29]]}},"container-title":["2019 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8682239\/8702066\/08702085.pdf?arnumber=8702085","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,15]],"date-time":"2022-07-15T03:10:46Z","timestamp":1657854646000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8702085\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,5]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/iscas.2019.8702085","relation":{},"subject":[],"published":{"date-parts":[[2019,5]]}}}