{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,1]],"date-time":"2026-04-01T15:01:25Z","timestamp":1775055685382,"version":"3.50.1"},"reference-count":10,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,5,1]],"date-time":"2019-05-01T00:00:00Z","timestamp":1556668800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,5,1]],"date-time":"2019-05-01T00:00:00Z","timestamp":1556668800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,5,1]],"date-time":"2019-05-01T00:00:00Z","timestamp":1556668800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,5]]},"DOI":"10.1109\/iscas.2019.8702463","type":"proceedings-article","created":{"date-parts":[[2019,5,1]],"date-time":"2019-05-01T21:02:28Z","timestamp":1556744548000},"page":"1-5","source":"Crossref","is-referenced-by-count":9,"title":["Calibration and Correction of Timing Mismatch Error in Two-Channel Time-Interleaved DACs"],"prefix":"10.1109","author":[{"given":"Saihua","family":"Xu","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jun Wei","family":"Lee","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2008.2004538"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.829968"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ICDSP.2018.8631852"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ICUWB.2007.4380971"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2011.2172526"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/CSNDSP.2008.4610774"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TIM.2008.2003313"},{"key":"ref2","first-page":"118","article-title":"A 350 MHz low-OSR ?? current-steering DAC with active termination in 0.13 ?m CMOS","author":"clara","year":"2005","journal-title":"Proc IEEE Int Solid-State Circuits Conf"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2018.8351366"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1980.1051512"}],"event":{"name":"2019 IEEE International Symposium on Circuits and Systems (ISCAS)","location":"Sapporo, Japan","start":{"date-parts":[[2019,5,26]]},"end":{"date-parts":[[2019,5,29]]}},"container-title":["2019 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8682239\/8702066\/08702463.pdf?arnumber=8702463","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,15]],"date-time":"2022-07-15T03:21:51Z","timestamp":1657855311000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8702463\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,5]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/iscas.2019.8702463","relation":{},"subject":[],"published":{"date-parts":[[2019,5]]}}}