{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T07:06:39Z","timestamp":1730271999361,"version":"3.28.0"},"reference-count":21,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,5,1]],"date-time":"2019-05-01T00:00:00Z","timestamp":1556668800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,5,1]],"date-time":"2019-05-01T00:00:00Z","timestamp":1556668800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,5,1]],"date-time":"2019-05-01T00:00:00Z","timestamp":1556668800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,5]]},"DOI":"10.1109\/iscas.2019.8702589","type":"proceedings-article","created":{"date-parts":[[2019,5,1]],"date-time":"2019-05-01T17:02:28Z","timestamp":1556730148000},"page":"1-5","source":"Crossref","is-referenced-by-count":6,"title":["MulMapper: Towards an Automated FPGA-Based CNN Processor Generator Based on a Dynamic Design Space Exploration"],"prefix":"10.1109","author":[{"given":"Muluken","family":"Hailesellasie","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Syed Rafay","family":"Hasan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Otmane Ait","family":"Mohamed","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","article-title":"Dnnweaver: From high-level deep network models to fpga acceleration","author":"sharma","year":"2016","journal-title":"the Workshop on Cognitive Architectures"},{"key":"ref11","article-title":"Caffeine: towards uniformed representation and acceleration for deep convolutional neural networks","author":"zhang","year":"2016","journal-title":"Proceedings of the 35th international conference on Computer-Aided Design"},{"key":"ref12","article-title":"Automatic code generation of convolutional neural networks in FPGA implementation","author":"liu","year":"2016","journal-title":"Field-Programmable Technology (FPT) 2016 International Conference"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/3020078.3021744"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2017.25"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2017.8050809"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062207"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/3174243.3174265"},{"year":"0","key":"ref18","article-title":"Berkeley Vision and Learning Center"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2016.7783720"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2017.8050317"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2018.8351283"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898003"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2016.22"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2017.12.009"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2017.2705069"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/3186332"},{"key":"ref1","doi-asserted-by":"crossref","first-page":"436","DOI":"10.1038\/nature14539","article-title":"Deep learning.","volume":"521","author":"lecun","year":"2015","journal-title":"Nature"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/LES.2017.2743247"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ICCVW.2009.5457611"},{"year":"0","key":"ref21","article-title":"CIFAR-10"}],"event":{"name":"2019 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2019,5,26]]},"location":"Sapporo, Japan","end":{"date-parts":[[2019,5,29]]}},"container-title":["2019 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8682239\/8702066\/08702589.pdf?arnumber=8702589","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,14]],"date-time":"2022-07-14T23:21:50Z","timestamp":1657840910000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8702589\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,5]]},"references-count":21,"URL":"https:\/\/doi.org\/10.1109\/iscas.2019.8702589","relation":{},"subject":[],"published":{"date-parts":[[2019,5]]}}}